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644e3261d1
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24 Commits

Author SHA1 Message Date
Chris Lattner
644e3261d1 Add printing support for sahf & setcc 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4804 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-21 17:10:57 +00:00
Chris Lattner
4b4e9dd937 Rename the SetCC X86 instructions to reflect the fact that they are the 
register versions


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4800 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-21 16:19:42 +00:00
Chris Lattner
0dc20dda5b Huge diff do to reindeinting comments. 
Basically just adds OpSize flags for instructions that need them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4795 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-21 01:33:28 +00:00
Brian Gaeke
c03a0cb01b Brian Gaeke says: 
lib/Target/X86/InstSelectSimple.cpp: Add a little something to
 visitBranchInst which supports conditional branches.
lib/Target/X86/X86InstrInfo.def: Add defs of JNE, JE, CMPri8


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4755 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-19 09:08:47 +00:00
Chris Lattner
6aab9cf65c Start to add more information to instr.def 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4741 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-18 05:37:11 +00:00
Chris Lattner
239dcfd215 Add instruction annotation about whether it has a 0x0F opcode prefix 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4740 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-18 01:59:28 +00:00
Chris Lattner
9213b73c19 Add more void flags 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4739 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-18 01:37:48 +00:00
Chris Lattner
92bd0f9c4d Set the void flag on instructions that should get it 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4738 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-18 01:34:36 +00:00
Chris Lattner
e7236ffa94 Add load/store instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4711 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-17 20:33:12 +00:00
Brian Gaeke
6559bb96a9 include/llvm/CodeGen/MachineInstrBuilder.h: Add addClobber() inline 
convenience method.  Fix typo in comment.
lib/Target/X86/InstSelectSimple.cpp: Explicitly specify some implicit uses.
 Use MOVZX/MOVSX instead of MOV instructions with sign extend instructions.
 Take out LEAVE instructions.
 32-bit IDIV and DIV use CDQ, not CWQ (CWQ is a typo).
 Fix typo in comment and remove some FIXME comments.
lib/Target/X86/Printer.cpp: Include X86InstrInfo.h and llvm/Function.h.
 Add some simple code to Printer::runOnFunction to iterate over
  MachineBasicBlocks and call X86InstrInfo::print().
lib/Target/X86/X86InstrInfo.def: Make some more instructions with
 implicit defs "Void".  Add more sign/zero extending "move" insns
 (movsx, movzx).
lib/Target/X86/X86RegisterInfo.def: Add EFLAGS as a register.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4707 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-14 22:32:30 +00:00
Brian Gaeke
20abb6bf45 InstSelectSimple.cpp: (visitReturnInst) Add return instructions with return 
values.
X86InstrInfo.def: add LEAVE instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4691 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-11 19:37:09 +00:00
Brian Gaeke
1749d6359b Add instruction selection code and tests for setcc instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4603 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-07 17:59:21 +00:00
Chris Lattner
f01729ea56 Implement signed and unsigned division and remainder 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4508 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-02 20:54:46 +00:00
Chris Lattner
ca9671d864 Implement multiply operator 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4506 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-02 20:28:58 +00:00
Chris Lattner
68aad93291 * Implement subtract 
* Merge add code into logical code


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4503 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-02 20:13:22 +00:00
Chris Lattner
e2954c84e9 shuffle code around a bit, implement and, or, xor 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4502 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-02 20:04:26 +00:00
Chris Lattner
2df035bb3c Implement unconditional branching support 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4498 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-11-02 19:27:56 +00:00
Brian Gaeke
a1719c9130 InstSelectSimple.cpp: Include llvm/iOther.h for ShiftInst. 
Add ISel::visitShiftInst() to instruction select shift instructions.
 Add a comment in visitAdd about how to do 64 bit adds.

X86InstrInfo.def: Add register-to-register move opcodes and shift opcodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4477 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-10-31 23:03:59 +00:00
Chris Lattner
b752e9a2ae Set the destination register field based on the target specific flags 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4442 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-10-30 01:15:31 +00:00
Chris Lattner
9d17740295 Add flag to specify when no value is produced by an instruction 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4441 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-10-30 01:09:34 +00:00
Chris Lattner
33f53b554a Minor renaming 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4410 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-10-29 20:48:56 +00:00
Chris Lattner
79c033765c Switch to different flag set 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4393 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-10-29 17:42:40 +00:00
Chris Lattner
65a78f28e3 Add instruction definitions for mov r, imm instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4296 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-10-27 21:16:44 +00:00
Chris Lattner
726140821f Initial checkin of X86 backend. 
We can instruction select exactly one instruction 'ret void'.  Wow.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4284 91177308-0d34-0410-b5e6-96231b3b80d8
 2002-10-25 22:55:53 +00:00