Fix PR27943 "Bad machine code: Using an undefined physical register".
SUBFC8 implicitly defines the CR0 register, but this was omitted in
the instruction definition.
Patch by Jameson Nash <jameson@juliacomputing.com>
Reviewers: hfinkel
Differential Revision: http://reviews.llvm.org/D20802
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@271425 91177308-0d34-0410-b5e6-96231b3b80d8
Passing an empty struct as a function call argument is now supported.
unit tests for various scenarios added.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@271374 91177308-0d34-0410-b5e6-96231b3b80d8
Looks like something isn't quite right still. Also forgot to move the test cases to an autoupgrade test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@271363 91177308-0d34-0410-b5e6-96231b3b80d8
Physregs have no associated register class, do not attempt to modify it
in Thumb2InstrInfo::storeRegToStackSlot()/loadFromStackSlot().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@271339 91177308-0d34-0410-b5e6-96231b3b80d8
A constant pool holding the address of a variable in equivalent to
a got entry. It produces exactly the same instruction sequence as a
got use and unlike a got use this is not uniqued by the linker.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@271311 91177308-0d34-0410-b5e6-96231b3b80d8
Enforce compact branch register restrictions such as the use of the zero
register, both operands being the same register. Emit clear error in such
cases as the issue is subtle.
For bovc and bnvc, silently fixup such cases when emitting objects directly,
like LLVM started doing in rL269899.
Reviewers: vkalintiris, dsanders
Differential Review: http://reviews.llvm.org/D20475
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@271301 91177308-0d34-0410-b5e6-96231b3b80d8
Introduced in r271244, this is probably undefined behaviour and asserts when
compiled with Visual C++ debug mode.
On further note, the loop is quadratic with regard to the number of successors
since removeSuccessor is linear and could probably be modified to linear time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@271278 91177308-0d34-0410-b5e6-96231b3b80d8
This adds support to the backed to actually support SjLj EH as an exception
model. This is *NOT* the default model, and requires explicitly opting into it
from the frontend. GCC supports this model and for MinGW can still be enabled
via the `--using-sjlj-exceptions` options.
Addresses PR27749!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@271244 91177308-0d34-0410-b5e6-96231b3b80d8
This patch removes the llvm intrinsics VPMOVSX and (V)PMOVZX sign/zero extension intrinsics and auto-upgrades to SEXT/ZEXT calls instead. We already did this for SSE41 PMOVSX sometime ago so much of that implementation can be reused.
Reapplied now that the the companion patch (D20684) removes/auto-upgrade the clang intrinsics has been committed.
Differential Revision: http://reviews.llvm.org/D20686
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@271131 91177308-0d34-0410-b5e6-96231b3b80d8
We were producing R_X86_64_GOTPCRELX for invalid instructions and
sometimes producing R_X86_64_GOTPCRELX instead of
R_X86_64_REX_GOTPCRELX.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@271118 91177308-0d34-0410-b5e6-96231b3b80d8
This reverts commit r271096, as reverting it broke even more buildbots!
But that also means I'll break on ARM again... :(
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@271099 91177308-0d34-0410-b5e6-96231b3b80d8
Composing subreg_loreg with subreg_oveflow leads to strange results with
lane masks for register classes with subreg_loreg. In particular, dead
lane detection generates incorrect code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@271087 91177308-0d34-0410-b5e6-96231b3b80d8
Remove broken patterns matching it. This was matching the
unsafe math pattern and expanding the fix for the buggy instruction
from the pattern. The problems are also on CI. Remove the workarounds
and only use fract with unsafe math or from the intrinsic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@271078 91177308-0d34-0410-b5e6-96231b3b80d8
DynamicNoPIC was only every used on darwin. This maps it to static on
ELF. It matches what is done on X86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@271052 91177308-0d34-0410-b5e6-96231b3b80d8
When running mir tests, a pass created in that constructor would not be
freed, leading to memory leaks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@271043 91177308-0d34-0410-b5e6-96231b3b80d8
