44597 Commits

Author SHA1 Message Date
Simon Pilgrim
93ed699220 [X86][AVX512] Relax assertion and just exit combine for unsupported types (PR32907)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302361 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-06 20:53:52 +00:00
Simon Pilgrim
a299d1ac39 [X86][AVX512] Move v2i64/v4i64 VPABS lowering to tablegen
Extend NoVLX targets to use the 512-bit versions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302359 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-06 19:11:59 +00:00
Simon Pilgrim
ad814518f6 [X86][SSE] Break register dependencies on v16i8/v8i16 BUILD_VECTOR on SSE41
rL294581 broke unnecessary register dependencies on partial v16i8/v8i16 BUILD_VECTORs, but on SSE41 we (currently) use insertion for full BUILD_VECTORs as well. By allowing full insertion to occur on SSE41 targets we can break register dependencies here as well.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302355 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-06 17:30:39 +00:00
Simon Pilgrim
88a4e3bee5 [X86][AVX2] Add scheduling latency/throughput tests for some AVX2 instructions
Many more to come...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302338 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-06 13:46:09 +00:00
Simon Pilgrim
461798230c [DAGCombiner] If ISD::ABS is legal/custom, use it directly instead of canonicalizing first.
Remove an extra canonicalization step if ISD::ABS is going to be used anyway.

Updated x86 abs combine to check that we are lowering from both canonicalizations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302337 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-06 13:44:42 +00:00
Krzysztof Parzyszek
6d59bf7ade [RDF] Remove covered parts of reached uses for phi and use in same block
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302305 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-05 22:10:32 +00:00
Matthias Braun
97beda0626 ARM: Compute MaxCallFrame size early
This exposes a method in MachineFrameInfo that calculates
MaxCallFrameSize and calls it after instruction selection in the ARM
target.

This avoids
ARMBaseRegisterInfo::canRealignStack()/ARMFrameLowering::hasReservedCallFrame()
giving different answers in early/late phases of codegen.

The testcase shows a particular nasty example result of that where we
would fail to properly align an alloca.

Differential Revision: https://reviews.llvm.org/D32622

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302303 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-05 22:04:05 +00:00
Matthias Braun
4463e11348 Add missing target triple to test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302301 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-05 21:50:26 +00:00
Kannan Narayanan
96d48fac54 [AMDGPU] In the new waitcnt insertion pass, use getHeader
instead of getTopBlock to find the loop header.

Differential Revision: https://reviews.llvm.org/D32831



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302290 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-05 21:10:17 +00:00
Matthias Braun
0cb25a2a10 MIParser/MIRPrinter: Compute block successors if not explicitely specified
- MIParser: If the successor list is not specified successors will be
  added based on basic block operands in the block and possible
  fallthrough.

- MIRPrinter: Adds a new `simplify-mir` option, with that option set:
  Skip printing of block successor lists in cases where the
  parser is guaranteed to reconstruct it. This means we still print the
  list if some successor cannot be determined (happens for example for
  jump tables), if the successor order changes or branch probabilities
  being unequal.

Differential Revision: https://reviews.llvm.org/D31262

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302289 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-05 21:09:30 +00:00
Konstantin Zhuravlyov
d2ff9194d6 AMDGPU/AMDHSA: Set COMPUTE_PGM_RSRC2:LDS_SIZE to 0
This field is populated by the CP

Differential Revision: https://reviews.llvm.org/D32619


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302277 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-05 20:13:55 +00:00
Sam Clegg
afe8111c69 [WebAssembly] Add ObjectYAML support for wasm name section
Differential Revision: https://reviews.llvm.org/D32841

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302266 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-05 18:12:34 +00:00
Alexei Starovoitov
0a1cb7297f [bpf] fix a bug which causes incorrect big endian reloc fixup
o Add bpfeb support in BPF dwarfdump unit test case

Signed-off-by: Yonghong Song <yhs@fb.com>
Signed-off-by: Alexei Starovoitov <ast@fb.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302265 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-05 18:05:00 +00:00
Amaury Sechet
91c57a1252 Add more variations of addcarry in the tests. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302252 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-05 16:27:55 +00:00
Sanjay Patel
d439e709a9 [InstSimplify] fix copy-paste mistake in test comments; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302251 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-05 16:24:58 +00:00
Sanjay Patel
5eef1b5eb5 [InstSimplify] add tests for (icmp X, C1 | icmp X, C2); NFC
These are the 'or' counterparts for the tests added with r300493.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302248 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-05 16:12:05 +00:00
Simon Pilgrim
776b058abe [X86][SSE] Add 128/256/512 bit vector build vector from register tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302243 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-05 15:36:31 +00:00
Aditya Kumar
978eb7c50b [LoopIdiom] check for safety while expanding
Loop Idiom recognition was generating memset in a case that
would result generating a division operation to an unsafe location.

Differential Revision: https://reviews.llvm.org/D32674

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302238 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-05 14:49:45 +00:00
Simon Pilgrim
4df50595db [X86][AVX512] Improve support and testing for CTLZ of 512-bit vectors without CDI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302233 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-05 13:31:52 +00:00
Krzysztof Parzyszek
3da6edb996 Remove stale live-ins in the branch folder
Hoisting common code can cause registers that live-in in the successor
blocks to no longer be live-in. The live-in information needs to be
updated to reflect this, or otherwise incorrect code can be generated
later on.

Differential Revision: https://reviews.llvm.org/D32661


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302228 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-05 12:20:07 +00:00
John Brawn
69798f0bc0 [ARM] Add support for ORR and ORN instruction substitutions
Recently support was added for substituting one intruction for another by
negating or inverting the immediate, but ORR and ORN were missed so this patch
adds them.

This one is slightly different to the others in that ORN only exists in thumb,
so we only do the substitution in thumb.

Differential Revision: https://reviews.llvm.org/D32534


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302224 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-05 11:31:25 +00:00
George Rimar
a83f092580 [llvm-dwarfdump] - Print an error message if section decompression failed.
llvm-dwarfdump currently prints no message if decompression fails 
for some reason. I noticed that during work on one of LLD patches 
where LLD produced an broken output. It was a bit confusing to see
no output for section dumped and no any error message at all.

Patch adds error message for such cases.

Differential revision: https://reviews.llvm.org/D32865

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302221 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-05 10:52:39 +00:00
Martin Storsjo
ae5b79d34f [ArgPromotion] Add a testcase for PR32917
Differential Revision: https://reviews.llvm.org/D32882

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302216 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-05 08:40:24 +00:00
Dehao Chen
c6a0731aa0 Update VP prof metadata during inlining.
Summary: r298270 added profile update logic for branch_weights. This patch implements profile update logic for VP prof metadata too.

Reviewers: eraman, tejohnson, davidxl

Reviewed By: eraman

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D32773

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302209 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-05 00:47:34 +00:00
Evgeniy Stepanov
1565077013 Remap metadata attached to global variables.
Fix for PR32577.
Global variables may have !associated metadata, which includes a reference to another global. It needs remapping.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302203 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-04 23:29:39 +00:00
Marek Olsak
24aaeeb480 AMDGPU: GFX9 GS and HS shaders always have the scratch wave offset in SGPR5
Reviewers: arsenm, nhaehnle

Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D32645

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302200 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-04 22:25:20 +00:00
Aditya Nandakumar
6007e7215b [GISel]: Add support to translate ConstantVectors
Reviewed by Quentin
https://reviews.llvm.org/D32814

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302196 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-04 21:43:12 +00:00
Sanjay Patel
0eebc2900c [InstSimplify] add folds for or-of-casted-icmps
The sibling folds for 'and' with casts were added with https://reviews.llvm.org/rL273200.
This is a preliminary step for adding the 'or' variants for the folds added with https://reviews.llvm.org/rL301260.

The reason for the strange form with constant LHS in the 1st test is because there's another missing fold in that
case for the inverted predicate. That should be fixed when we add the ConstantRange functionality for 'or-of-icmps' 
that already exists for 'and-of-icmps'.

I'm hoping to share more code for the and/or cases, so we won't have these differences. This will allow us to remove
code from InstCombine. It's also possible that we can remove some code here in InstSimplify. I think we have some 
duplicated folds because patterns are not matched in a general way.

Differential Revision: https://reviews.llvm.org/D32876


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302189 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-04 19:51:34 +00:00
Sam Clegg
740b80d883 [WebAssembly] Add wasm symbol table support to llvm-objdump
Differential Revision: https://reviews.llvm.org/D32760

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302185 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-04 19:32:43 +00:00
Krzysztof Parzyszek
8175a1d583 [PPC] When restoring R30 (PIC base pointer), mark it as <def>
This happened on the PPC32/SVR4 path and was discovered when building
FreeBSD on PPC32. It was a typo-class error in the frame lowering code.

This fixes PR26519.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302183 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-04 19:14:54 +00:00
Reid Kleckner
984dc047e7 [ms-inline-asm] Use the frontend size only for ambiguous instructions
This avoids problems on code like this:
  char buf[16];
  __asm {
    movups xmm0, [buf]
    mov [buf], eax
  }

The frontend size in this case (1) is wrong, and the register makes the
instruction matching unambiguous. There are also enough bytes available
that we shouldn't complain to the user that they are potentially using
an incorrectly sized instruction to access the variable.

Supersedes D32636 and D26586 and fixes PR28266

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302179 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-04 18:19:52 +00:00
Sanjay Patel
151fce62d4 [InstSimplify] add tests for or-of-casted-icmps; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302174 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-04 17:36:53 +00:00
Easwaran Raman
de37aad1ce [PM] Add ProfileSummaryAnalysis as a required pass in the new pipeline.
Differential revision: https://reviews.llvm.org/D32768

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302170 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-04 16:58:45 +00:00
Adrian Prantl
cf1aa41d02 Add accidentally deleted testcase back.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302167 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-04 16:26:07 +00:00
Adrian Prantl
5013f6327b Cleanup tests to not share a DISubprogram between multiple Functions.
rdar://problem/31926379

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302166 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-04 16:24:31 +00:00
Chad Rosier
fd8f24ed83 [DAGCombine] Transform (fadd A, (fmul B, -2.0)) -> (fsub A, (fadd B, B)).
Differential Revision: http://reviews.llvm.org/D32596

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302153 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-04 14:14:44 +00:00
Simon Pilgrim
c4ebc170a3 [X86][AVX512] Fix VPABSD file checks
Fix capitalization and string matching

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302150 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-04 13:42:57 +00:00
Simon Pilgrim
547297e139 [X86][SSE] Add i686 triple tests for partial vector and re-association
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302149 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-04 13:35:40 +00:00
Jonas Paulsson
f9384e2aa0 [SystemZ] Make copyPhysReg() add impl-use operands of super reg.
When a 128 bit COPY is lowered into two instructions, an impl-use operand of
the super-reg should be added to each new instruction in case one of the
sub-regs is undefined.

Review: Ulrich Weigand

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302146 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-04 13:33:30 +00:00
Simon Pilgrim
ab88930c35 [X86][SSE] Add i686 triple tests for PBLENDW commutation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302145 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-04 13:08:09 +00:00
Simon Pilgrim
22f849435c [X86][AVX1] Regenerate checks and add i686 triple tests for folded logical ops
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302144 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-04 13:00:30 +00:00
Michael Zuckerman
e11b0c62e8 [LLVM][inline-asm][Altmacor] Altmacro string delimiter '<..>'
In this patch, I introduce a new altmacro string delimiter. 
This review is the second review in a series of four reviews.
(one for each altmacro feature: LOCAL, string delimiter, string '!' escape sign and absolute expression as a string '%' ).

In the alternate macro mode, you can delimit strings with matching angle brackets <..> 
when using it as a part of calling macro arguments.

As described in the https://sourceware.org/binutils/docs-2.27/as/Altmacro.html
"<string>
You can delimit strings with matching angle brackets."

assumptions:

1. If an argument begins with '<' and ends with '>'. The argument is considered as a string.
2. Except adding new string mark '<..>', a regular macro behavior is expected.
3. The altmacro cannot affect the regular less/greater behavior.
4. If a comma is present inside an angle brackets it considered as a character and not as a separator.

Differential Revision: https://reviews.llvm.org/D32701


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302135 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-04 10:37:00 +00:00
Igor Breger
0e40641a77 [X86][AVX-512] Allow EVEX encoded instruction selection when available for mul v8i32.
Differential Revision: https://reviews.llvm.org/D32679

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302127 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-04 07:34:58 +00:00
Sam Parker
47d5da39f5 [ARM] ACLE Chapter 9 intrinsics
Added the integer data processing intrinsics from ACLE v2.1 Chapter 9
but I have missed out the saturation_occurred intrinsics for now. For
the instructions that read and write the GE bits, a chain is included
and the only instruction that reads these flags (sel) is only
selectable via the implemented intrinsic.

Differential Revision: https://reviews.llvm.org/D32281


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302126 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-04 07:31:28 +00:00
Oren Ben Simhon
9d00f4f98a [X86] Disabling PLT in Regcall CC Functions
According to psABI, PLT stub clobbers XMM8-XMM15.
In Regcall calling convention those registers are used for passing parameters. 
Thus we need to prevent lazy binding in Regcall.

Differential Revision: https://reviews.llvm.org/D32430


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302124 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-04 07:22:49 +00:00
Igor Breger
672e96e594 [AVX-512VL] Autogenerate checks. Add --show-mc-encoding to check instruction predicate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302123 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-04 06:53:31 +00:00
Craig Topper
9e4ad9cbb5 [SelectionDAG] Improve known bits support for CTPOP.
This is based on the same concept from ValueTracking's version of computeKnownBits.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302110 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-04 04:33:27 +00:00
Dean Michael Berris
acf912e5ba [XRay] Create an Index of sleds per function
Summary:
This change adds a new section to the xray-instrumented binary that
stores an index into ranges of the instrumentation map, where sleds
associated with the same function can be accessed as an array. At
runtime, we can get access to this index by function ID offset allowing
for selective patching and unpatching by function ID.

Each entry in this new section (xray_fn_idx) will include two pointers
indicating the start and one past the end of the sleds associated with
the same function. These entries will be 16 bytes long on x86 and
aarch64. On arm, we align to 16 bytes anyway so the runtime has to take
that into consideration.

__{start,stop}_xray_fn_idx will be the symbols that the runtime will
look for when we implement the selective patching/unpatching by function
id APIs. Because XRay synthesizes the function id's in a monotonically
increasing manner at runtime now, implementations (and users) can use
this table to look up the sleds associated with a specific function.
This is useful in implementations that want to do things like:

  - Implement coverage mode for functions by patching everything
    pre-main, then as functions are encountered, the installed handler
    can unpatch the function that's been encountered after recording
    that it's been called.
  - Do "learning mode", so that the implementation can figure out some
    statistical information about function calls by function id for a
    time being, and then determine which functions are worth
    uninstrumenting at runtime.
  - Do "selective instrumentation" where an implementation can
    specifically instrument only certain function id's at runtime
    (either based on some external data, or through some other
    heuristics) instead of patching all the instrumented functions at
    runtime.

Reviewers: dblaikie, echristo, chandlerc, javed.absar

Subscribers: pelikan, aemerson, kpw, llvm-commits, rengolin

Differential Revision: https://reviews.llvm.org/D32693

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302109 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-04 03:37:57 +00:00
Dean Michael Berris
875f0a3e72 [XRay] Detect loops in functions being lowered
Summary:
This is an implementation of the loop detection logic that XRay needs to
determine whether a function might take time at runtime. Without this
heuristic, XRay will tend to not instrument short functions that have
loops that might have runtime dependent on inputs or external values.

While this implementation doesn't do any further analysis than just
figuring out whether there is a loop in the MachineFunction being
code-gen'ed, we're paving the way for being able to perform more
sophisticated analysis of the function in the future (for example to
determine whether the trip count for the loop might be constant, and
make a decision on that instead). This enables us to cover more
functions with the default heuristics, and potentially identify ones
that have variable runtime latency just by looking for the presence of
loops.

Reviewers: chandlerc, rnk, pelikan

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D32274

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302103 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-04 01:24:26 +00:00
Michael Zolotukhin
805e09d964 [SCEV] createAddRecFromPHI: Optimize for the most common case.
Summary:
The existing implementation creates a symbolic SCEV expression every
time we analyze a phi node and then has to remove it, when the analysis
is finished. This is very expensive, and in most of the cases it's also
unnecessary. According to the data I collected, ~60-70% of analyzed phi
nodes (measured on SPEC) have the following form:
  PN = phi(Start, OP(Self, Constant))
Handling such cases separately significantly speeds this up.

Reviewers: sanjoy, pete

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D32663

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302096 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-03 23:53:38 +00:00