Eli Friedman
a64eb92fe3
Make promotion in operation legalization for SETCC work correctly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76153 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-17 05:16:04 +00:00
Anton Korobeynikov
b8e9ac834a
Emit cross regclass register moves for thumb2.
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Minor code duplication cleanup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76124 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 23:26:06 +00:00
Dale Johannesen
423ccfe51d
Assume an inline asm might be a call, so we get
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stack alignment right when it is. This is not
ideal but conservatively correct. Adjust a test
to compensate for changed stack offset value.
gcc.apple/asm-block-57.c
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76120 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 22:34:45 +00:00
David Greene
3ac1ab835c
Emit line numbers in asm comments when available.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76117 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 22:24:20 +00:00
Jakob Stoklund Olesen
57e599a46b
Teach MachineInstr::isRegTiedToDefOperand() to correctly parse inline asm operands.
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The inline asm operands must be parsed from the first flag, you cannot assume
that an immediate operand preceeding a register use operand is the flag.
PowerPC "m" operands are represented as (flag, imm, reg) triples.
isRegTiedToDefOperand() would incorrectly interpret the imm as the flag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76101 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 20:58:34 +00:00
Evan Cheng
5f15992b77
Changed my mind. We now allow remat of instructions whose defs have subreg indices.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76100 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 20:15:00 +00:00
Chris Lattner
dfce360306
this should be xfailed on darwin. Darwin doesn't use the libstdc++ in the llvm-gcc distro, it uses the system version.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76095 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 18:45:51 +00:00
Evan Cheng
2b48ab947c
With recent MC changes, RIP base register is explicitly modeled. Make sure we add it when x86 V_SET0 / V_SETALLONES (by transforming it into a constpool load) into the use instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76094 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 18:44:05 +00:00
Dan Gohman
850f791abc
Fill in some holes in ScalarEvolution's loop iteration condition
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analysis. This allows indvars to emit a simpler loop trip count
expression.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76085 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 17:34:36 +00:00
Anton Korobeynikov
ebfe2b2722
Make xfail proper
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76065 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:53:47 +00:00
Anton Korobeynikov
c975180624
Temporary disable 16 bit bswap
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76063 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:35:57 +00:00
Anton Korobeynikov
6ff3f2c710
Add bswap patterns
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76061 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:34:52 +00:00
Anton Korobeynikov
54681eca69
Fix logic inversion for RI-mode address selection
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76052 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:31:14 +00:00
Anton Korobeynikov
9419a0d13d
Unbreak the test
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76051 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:30:49 +00:00
Anton Korobeynikov
bb8a04806d
Expand 32-bit bitconverts via memory
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76050 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:30:29 +00:00
Anton Korobeynikov
f2fd8ea1c9
Fix incomin arg stack frame offset in case we need to generate stack frame
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76049 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:29:57 +00:00
Anton Korobeynikov
5dd38de2c2
Revert the commit, it just hides the real bug
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76045 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:28:26 +00:00
Anton Korobeynikov
75eef89ddb
Lower anyext to zext, 32-bit stuff does not have any implicit zero-extension side effects
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76035 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:24:41 +00:00
Anton Korobeynikov
8bd0db7615
Provide consistent subreg idx scheme. This (hopefully) fixes remaining divide problems
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76011 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:18:17 +00:00
Anton Korobeynikov
6fe326c713
Implement 'large' PIC model
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76006 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:16:05 +00:00
Anton Korobeynikov
48e8b3cc58
Implement shifts properly (hopefilly - finally!)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76005 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:15:24 +00:00
Anton Korobeynikov
0a42d2b437
Properly handle divides. As a bonus - implement memory versions of them.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76003 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:14:33 +00:00
Anton Korobeynikov
014d4639d8
32 bit shifts have only 12 bit displacements
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76000 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:13:24 +00:00
Anton Korobeynikov
1ed1e3ecd4
Consolidate reg-imm / reg-reg-imm address mode selection logic in one place.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75990 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:10:17 +00:00
Anton Korobeynikov
720e3b00b8
Add support for 12 bit displacements
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75988 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:09:35 +00:00
Anton Korobeynikov
980d5503c3
Emit proper lowering of load from arg stack slot
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75986 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:08:42 +00:00
Anton Korobeynikov
c772c4408e
Implement dynamic allocas
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75985 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:08:15 +00:00
Anton Korobeynikov
c16cdc5de7
Add jump tables
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75984 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:07:50 +00:00
Anton Korobeynikov
759205d1ac
Add rotates
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75981 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:06:49 +00:00
Anton Korobeynikov
cfca8b1f62
Add patterns for integer negate
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75980 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:06:27 +00:00
Anton Korobeynikov
8c993e1632
Provide proper patterns for and with imm instructions. Tune the tests accordingly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75979 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:06:00 +00:00
Anton Korobeynikov
25af73303f
Add 32 bit and reg-imm and disable invalid patterns for now
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75978 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:05:32 +00:00
Anton Korobeynikov
747052c1a5
Add z9 and z10 target processors. Mark z10-only instructions as such.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75977 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 14:05:00 +00:00
Anton Korobeynikov
22836d1b31
Proper lower 'small' results
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75962 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:58:24 +00:00
Anton Korobeynikov
eb68f1c661
Completel forgot about unconditional branches
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75961 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:57:52 +00:00
Anton Korobeynikov
bad769f11a
Lower addresses of globals
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75960 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:57:27 +00:00
Anton Korobeynikov
ed1a6d4cad
Test (incomplete) for easy muls
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75959 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:57:03 +00:00
Anton Korobeynikov
8d1837d9be
Provide "wide" muls and divs/rems
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75958 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:56:42 +00:00
Anton Korobeynikov
ecf22d5bdc
Tests for cmp / br_cc / select_cc
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75949 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:53:15 +00:00
Anton Korobeynikov
ef5decab53
Emit callee-saved regs spills / restores
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75943 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:51:12 +00:00
Anton Korobeynikov
ba249e41f3
Some preliminary call lowering
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75941 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:50:21 +00:00
Anton Korobeynikov
3c98c616c5
Prologue / epilogue emission
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75940 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:49:49 +00:00
Anton Korobeynikov
51f613fb2b
Add simple frame index elimination
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75939 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:49:25 +00:00
Anton Korobeynikov
81c0325cdf
Provide proper test :)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75938 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:48:59 +00:00
Anton Korobeynikov
711d5b68e0
Add address computation stuff
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75935 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:47:59 +00:00
Anton Korobeynikov
c8301d17a8
Add mem-imm stores
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75933 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:47:14 +00:00
Anton Korobeynikov
961bb6f430
Add stores and truncstores
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75931 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:45:00 +00:00
Anton Korobeynikov
dc28955b3f
Add patterns for various extloads
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75930 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:44:30 +00:00
Anton Korobeynikov
9e4816e09f
Add shifts and reg-imm address matching
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75927 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:43:18 +00:00
Anton Korobeynikov
a51752cbea
Add bunch of 32-bit patterns... Uffff :)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75926 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 13:42:31 +00:00