93897 Commits

Author SHA1 Message Date
Craig Topper
8cbb186f8c [AVX-512] Add masked commutable floating point max/min instructions to folding tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278628 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-14 17:57:19 +00:00
Craig Topper
48894694d5 [AVX-512] Add masked logical operations to memory folding tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278627 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-14 17:57:16 +00:00
Igor Breger
1a3669b36e [AVX512] Fix VFPCLASSSD/VFPCLASSSS intrinsic lowering. The i1 result should be zero extended according to SPEC.
Differential Revision: http://reviews.llvm.org/D23489

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278626 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-14 13:58:57 +00:00
Igor Breger
bf57b01543 [AVX512] Fix insertelement i1 lowering.
1. Use shuffle to insert element i1 into vector. The previous implementation was incorrect ( dest_bit OR src_bit , it doesn't clear the bit if src_bit=0 )
2. Improve shuffle i1 vector, use CVT2MASK if supported instead TRUNCATE.

Differential Revision: http://reviews.llvm.org/D23347

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278623 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-14 05:25:07 +00:00
Diana Picus
12fc2327af Revert "CodeGen: If Convert blocks that would form a diamond when tail-merged."
This reverts commit r278287.

This commit broke the clang-cmake-thumbv7-a15-full-sh bot.
See https://llvm.org/bugs/show_bug.cgi?id=28949

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278621 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-14 02:10:18 +00:00
Diana Picus
281da4f483 Revert "Codegen: Don't tail-duplicate blocks with un-analyzable fallthrough."
This reverts commit r278288.

r278287 broke the clang-cmake-thumbv7-a15-full-sh bot.
Revert this so we can get to r278287.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278620 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-14 02:10:12 +00:00
Sanjoy Das
d330744e57 [IRCE] Change variable grouping; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278619 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-14 01:04:50 +00:00
Sanjoy Das
39b554559f [IRCE] Create llvm::Loop instances for cloned out loops
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278618 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-14 01:04:46 +00:00
Sanjoy Das
300cd13205 [IRCE] Don't iterate on loops that were cloned out
IRCE has the ability to further version pre-loops and post-loops that it
created, but this isn't useful at all.  This change teaches IRCE to
leave behind some metadata in the loops it creates (by cloning the main
loop) so that these new loops are not re-processed by IRCE.

Today this bug is hidden by another bug -- IRCE does not update LoopInfo
properly so the loop pass manager does not re-invoke IRCE on the loops
it split out.  However, once the latter is fixed the bug addressed in
this change causes IRCE to infinite-loop in some cases (e.g. it splits
out a pre-loop, a pre-pre-loop from that, a pre-pre-pre-loop from that
and so on).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278617 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-14 01:04:36 +00:00
Sanjoy Das
abf7d54189 [IRCE] Add better DEBUG diagnostic; NFC
NFC meaning IRCE should not _do_ anything different, but
-debug-only=irce will be a little friendlier.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278616 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-14 01:04:31 +00:00
Mehdi Amini
2c1c0b444f Fix bitcode auto-upgrade when using bitcode lazy loading
The auto-upgrade path could be called before the VST (global
names) was fully parsed, and thus intrinsic names were not
available and the autoupgrade logic could not operate.

Fix link failures with ThinLTO.

This is a recommit of r278610 with a different fix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278615 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-14 00:01:27 +00:00
Ron Lieberman
26d2a23314 Fix unsupported relocation type R_HEX_6_X' for symbol .rodata
LowerTargetConstantPool is not properly setting the TargetFlag to indicate
desired relocation. Coding error, the offset parameter was omitted, so the
TargetFlag was used as the offset, and the TargetFlag defaulted to zero.

This only affects -fpic compilation, and only those items created in a
Constant Pool, for example a vector of constants. Halide ran into this issue.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278614 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-13 23:41:11 +00:00
Mehdi Amini
4510860b03 Revert "Fix bitcode auto-upgrade when using bitcode lazy loading"
This reverts commit r278610. Tests are broken

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278613 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-13 23:39:14 +00:00
Sanjoy Das
c56bea66ca [IRCE] Be resilient in the face of non-simplified loops
Loops containing `indirectbr` may not be in simplified form, even after
running LoopSimplify.  Reject then gracefully, instead of tripping an
assert.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278611 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-13 23:36:35 +00:00
Mehdi Amini
c5432bdac5 Fix bitcode auto-upgrade when using bitcode lazy loading
The auto-upgrade path could be called before the VST (global
names) was fully parsed, and thus intrinsic names were not
available and the autoupgrade logic could not operate.

Fix link failures with ThinLTO.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278610 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-13 23:31:53 +00:00
Mehdi Amini
804c815e77 Revert "Revert "Invariant start/end intrinsics overloaded for address space""
This reverts commit 32fc6488e48eafc0ca1bac1bd9cbf0008224d530.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278609 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-13 23:31:24 +00:00
Mehdi Amini
2eb84a568a Revert "Invariant start/end intrinsics overloaded for address space"
This reverts commit r276447.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278608 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-13 23:27:32 +00:00
Sanjoy Das
d2e55b6a0a [IRCE] Use dyn_cast instead of explicit isa/cast; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278607 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-13 22:00:12 +00:00
Sanjoy Das
81232a9017 [IRCE] Use range-for; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278606 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-13 22:00:09 +00:00
Aditya Kumar
3ee4558631 Test commit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278598 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-13 11:56:50 +00:00
Craig Topper
c819da39b5 [X86] Add a check of isCommutable at the top of X86InstrInfo::findCommutedOpIndices. Most callers don't check if the instruction is commutable before calling.
This saves us the trouble of ending up in the default of the switch and having to determine if this is an FMA or not.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278597 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-13 06:48:44 +00:00
Craig Topper
780d2023e8 [AVX-512] Add isCommutable to scalar FMA3 instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278596 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-13 06:48:41 +00:00
Craig Topper
c078bbed70 [AVX-512] Add commutable flags to 132 form FMA3 instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278595 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-13 06:48:39 +00:00
Craig Topper
1e8f440de1 [X86] Remove patterns for (vzmovl (insert_subvector undef, (scalar_to_vector))) as the (vzmovl VR256) pattern has higher priority. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278594 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-13 06:02:19 +00:00
Craig Topper
7efbb995ca [AVX-512] Remove an AddedComplexity that was prioritizing basic vzmovl patterns over more complex ones that produce better code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278593 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-13 05:43:20 +00:00
Craig Topper
e95ebf5c02 [AVX-512] Add patterns to support VZEXT_MOVL from 512-bit vectors with 64-bit and 32-bit elements.
Fixes PR28961.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278592 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-13 05:33:12 +00:00
Teresa Johnson
f970c6e67b [PM] Port LoopDataPrefetch to new pass manager
Summary:
Refactor the existing support into a LoopDataPrefetch implementation
class and a LoopDataPrefetchLegacyPass class that invokes it.
Add a new LoopDataPrefetchPass for the new pass manager that utilizes
the LoopDataPrefetch implementation class.

Reviewers: mehdi_amini

Subscribers: sanjoy, mzolotukhin, nemanjai, llvm-commits

Differential Revision: https://reviews.llvm.org/D23483

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278591 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-13 04:11:27 +00:00
Matt Arsenault
e8fc9abe31 AMDGPU: Fix not estimating MBB operand sizes correctly
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278590 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-13 01:43:54 +00:00
Matt Arsenault
b24aaff187 AMDGPU: Fix missing test for addressing mode with odd offsets
Add test if the constant offset looks unaligned.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278589 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-13 01:43:51 +00:00
Matt Arsenault
129b27ab08 AMDGPU/R600: Remove macros
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278588 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-13 01:43:46 +00:00
Hans Wennborg
46b81ba7eb Fix more dereferenced end() iterators after r278532
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278587 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-13 01:12:49 +00:00
Pete Cooper
1231164787 Constify ValueTracking. NFC.
Almost all of the method here are only analysing Value's as opposed to
mutating them.  Mark all of the easy ones as const.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278585 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-13 01:05:32 +00:00
Sanjoy Das
5b64093791 [IndVars] Ignore (s|z)exts that don't extend the induction variable
`IVVisitor::visitCast` used to have the invariant that if the
instruction it was passed was a sext or zext instruction, the result of
the instruction would be wider than the induction variable.  This is no
longer true after rL275037, so this change teaches `IndVarSimplify` s
implementation of `IVVisitor::visitCast` to work with the relaxed
invariant.

A corresponding change to SimplifyIndVar to preserve the said invariant
after rL275037 would also work, but given how `IVVisitor::visitCast` is
spelled (no indication of said invariant), I figured the current fix is
cleaner.

Fixes PR28935.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278584 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-13 00:58:31 +00:00
Eugene Zelenko
82d16ec877 Fix some Clang-tidy modernize-use-using and Include What You Use warnings.
Differential revision: https://reviews.llvm.org/D23478


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278583 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-13 00:50:41 +00:00
Justin Lebar
06c11279fd [LSV] Use a set rather than an ArraySlice at the end of getVectorizablePrefix. NFC
Summary: This avoids a small O(n^2) loop.

Reviewers: asbirlea

Subscribers: mzolotukhin, llvm-commits, arsenm

Differential Revision: https://reviews.llvm.org/D23473

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278581 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-13 00:04:12 +00:00
Justin Lebar
50724be200 [LSV] Use OrderedBasicBlock instead of rolling it ourselves. NFC
Summary:
In getVectorizablePrefix, this is less efficient (because we have to
iterate over the BB twice), but boy is it simpler.  Given how much
trouble we've had here, I think the simplicity gain is worthwhile.

In reorder(), this is actually more efficient, as
DominatorTree::dominates iterates over the BB from the beginning when
the two instructions are in the same BB.

Reviewers: asbirlea

Subscribers: arsenm, llvm-commits, mzolotukhin

Differential Revision: https://reviews.llvm.org/D23472

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278580 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-13 00:04:08 +00:00
Justin Lebar
18c3af1122 Minor comment fix ("generate" --> "generates").
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278578 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-12 23:58:19 +00:00
Hans Wennborg
be1a4e1ef5 X86: Fix another dereferenced end() iterator after r278532
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278577 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-12 23:35:59 +00:00
Haicheng Wu
881b0b207d Reapply [BranchFolding] Restrict tail merging loop blocks after MBP
Fixed a bug in the test case.

To fix PR28104, this patch restricts tail merging to blocks that belong to the
same loop after MBP.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278575 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-12 23:13:38 +00:00
Dominic Chen
5122298d87 Avoid accessing LLVM/DWARF register mappings if undefined
Summary:
If the backend does not define LLVM/DWARF register mappings, the associated
variables are undefined since the map initializer is called by auto-generated
TableGen routines. This patch initializes the pointers and sizes to nullptr
and zero, respectively, and checks that they are valid before searching
for a mapping.

Reviewers: grosbach, dschuff

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D23458

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278574 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-12 23:12:59 +00:00
Tim Shen
9e8ae09eb8 [LoopVectorize] Detect loops in the innermost loop before creating InnerLoopVectorizer
InnerLoopVectorizer shouldn't handle a loop with cycles inside the loop
body, even if that cycle isn't a natural loop.

Fixes PR28541.

Differential Revision: https://reviews.llvm.org/D22952

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278573 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-12 22:47:13 +00:00
Duncan P. N. Exon Smith
2b6735eb0f X86: Stop dereferencing end() in X86FrameLowering::emitEpilogue
On a Windows build of Chromium, r278532 (up to r278539)
X86FrameLowering::emitEpilogue because it wasn't wary enough of the
return of MachineBasicBlock::getFirstTerminator.  Guard all the uses
here.

Note that r278532 *looks* like an NFC commit (just an API change), but
it removes a couple of layers of abstraction and is probably causing
optimization differences in MSVC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278572 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-12 22:43:33 +00:00
Reid Kleckner
2a23370618 [Inliner] Don't treat inalloca allocas as static
They aren't static, and moving them to the entry block across something
else will only result in tears.

Root cause of http://crbug.com/636558.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278571 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-12 22:23:04 +00:00
Artem Belevich
e10646be3b [NVPTX] Use untyped (.b) integer registers in PTX.
This bring LLVM-generated PTX closer to what nvcc generates and avoids
triggering issues in ptxas.

For instance, ptxas does not accept .s16 (or .u16) registers as operands
for .fp16 instructions.

Differential Revision: https://reviews.llvm.org/D23460

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278568 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-12 22:02:19 +00:00
David L Kreitzer
43fb2934be Fixed typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278565 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-12 21:06:53 +00:00
Krzysztof Parzyszek
9d016efde2 [Hexagon] Cleanup and standardize vector load/store pseudo instructions
Remove the following single-vector load/store pseudo instructions, use real
instructions instead:
  LDriv_pseudo_V6         STriv_pseudo_V6
  LDriv_pseudo_V6_128B    STriv_pseudo_V6_128B
  LDrivv_indexed          STrivv_indexed
  LDrivv_indexed_128B     STrivv_indexed_128B

Rename the double-vector load/store pseudo instructions, add unaligned
counterparts:

  -- old --               -- new --            -- unaligned --
  LDrivv_pseudo_V6        PS_vloadrw_io        PS_vloadrwu_io
  LDrivv_pseudo_V6_128B   PS_vloadrw_io_128B   PS_vloadrwu_io_128B
  STrivv_pseudo_V6        PS_vstorerw_io       PS_vstorerwu_io
  STrivv_pseudo_V6_128B   PS_vstorerw_io_128   PS_vstorerwu_io_128


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278564 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-12 21:05:05 +00:00
Eli Friedman
7c00a88956 [AArch64LoadStoreOptimizer] Check aliasing correctly when creating paired loads/stores.
The existing code accidentally skipped the aliasing check in edge cases.

Differential revision: https://reviews.llvm.org/D23372



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278562 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-12 20:39:51 +00:00
Mike Aizatsky
a7eb97f818 [AArch64] Registering default MCInstrAnalysis
Even in this form it is useful: it can detect branch instructions.

https://github.com/google/sanitizers/issues/706

Subscribers: aemerson, rengolin

Differential Revision: https://reviews.llvm.org/D23426

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278560 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-12 20:28:05 +00:00
Eli Friedman
12a703d227 [AArch64LoadStoreOpt] Handle offsets correctly for post-indexed paired loads.
Trunk would try to create something like "stp x9, x8, [x0], #512", which isn't actually a valid instruction.

Differential revision: https://reviews.llvm.org/D23368



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278559 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-12 20:28:02 +00:00
Kevin Enderby
296471b040 Next set of additional error checks for invalid Mach-O files.
This contains the two missing checks for LC_SEGMENT load command fields.
And checks for the Mach-O sections fields that would make them invalid.

With the new checks, some of the existing malformed file checks now trips one
of these instead of the issue it was having before so those tests were adjusted.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@278557 91177308-0d34-0410-b5e6-96231b3b80d8
2016-08-12 20:10:25 +00:00