Commit Graph

7452 Commits

Author SHA1 Message Date
Bob Wilson
b7d0c90c44 Change Neon VLDn intrinsics to return multiple values instead of really
wide vectors.  Likewise, change VSTn intrinsics to take separate arguments
for each vector in a multi-vector struct.  Adjust tests accordingly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77468 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-29 16:39:22 +00:00
Nick Lewycky
02a0d0eb24 Just discard the output, no need to turn it back into text.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77439 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-29 06:14:52 +00:00
Chris Lattner
45ce89ba08 don't dump .bc file to stdout, and simplify this to a trivial testcase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77436 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-29 05:32:07 +00:00
Chris Lattner
b8f396bdbb fix PR4584 with a trivial patch now that the pieces are in place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77434 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-29 05:20:33 +00:00
Nick Lewycky
0efa921736 Bulk erasing instructions without RAUWing them is unsafe. Instead, break them
into a new BB that has no predecessors.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77433 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-29 05:17:50 +00:00
Evan Cheng
5657c01949 Optimize Thumb2 jumptable to use tbb / tbh when all the offsets fit in byte / halfword.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77422 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-29 02:18:14 +00:00
Eric Christopher
c841fe5fd1 Add a couple more tests for the ptest intrinsics to make sure we're
grabbing them all correctly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77413 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-29 00:51:15 +00:00
Eric Christopher
71c6753d03 Add support for gcc __builtin_ia32_ptest{z,c,nzc} intrinsics. Lower
to ptest instruction plus setcc. Revamp ptest instruction. Add test.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77407 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-29 00:28:05 +00:00
Andreas Bolka
7b43f5cdd1 Slightly reformat LDA tests to ease grepping.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77398 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-28 23:40:40 +00:00
Evan Cheng
e7c329bf4b In thumb2 mode, add pc is unpredictable. Use add + mov pc instead (that is until more optimization goes in).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77364 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-28 20:53:24 +00:00
David Goodwin
6340632d3b Remove support for ORN to workaround <rdar://problem/7096522>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77363 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-28 20:51:25 +00:00
David Goodwin
5743854f47 Add workaround for <rdar://problem/7098328>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77340 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-28 18:15:38 +00:00
Chris Lattner
3e23d42dee fix testcase for previous patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77338 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-28 18:04:18 +00:00
Chris Lattner
bf15e433b9 Fix PR4639, a ELF-TLS regression from some of my refactoring.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77336 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-28 17:57:51 +00:00
David Goodwin
3583df7676 Add Thumb-2 patterns for ARMsrl_flag and ARMsra_flag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77329 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-28 17:06:49 +00:00
Evan Cheng
bae20a6353 tADDrSPI doesn't have a predicate operand, but tADDhirr and tADDi3 have.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77305 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-28 07:38:35 +00:00
Evan Cheng
6495f63945 - More refactoring. This gets rid of all of the getOpcode calls.
- This change also makes it possible to switch between ARM / Thumb on a
  per-function basis.
- Fixed thumb2 routine which expand reg + arbitrary immediate. It was using
  using ARM so_imm logic.
- Use movw and movt to do reg + imm when profitable.
- Other code clean ups and minor optimizations.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77300 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-28 05:48:47 +00:00
Dan Gohman
d6aa02de10 Teach instcombine to respect and preserve inbounds. Add inbounds
to a few tests where it is required for the expected transformation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77290 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-28 01:40:03 +00:00
David Goodwin
1f0962756d ORN does not require (and can not have) the ".w" suffix. "Orthogonality" is a dirty word at ARM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77275 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-27 23:34:12 +00:00
Daniel Dunbar
f9507ffa5b llvm-mc: Implement .abort fully in the front end
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77272 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-27 23:20:52 +00:00
Dan Gohman
dd8004dc73 Add a new keyword 'inbounds' for use with getelementptr. See the
LangRef.html changes for details.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77259 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-27 21:53:46 +00:00
David Goodwin
af0d08d55c Add ".w" suffix for wide thumb-2 instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77199 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-27 16:31:55 +00:00
Sanjiv Gupta
c3ee7960d9 Test case to check that separate section is created for a global variable specified with section attribute.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77195 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-27 16:20:41 +00:00
Dan Gohman
59858cf792 Change the assembly syntax for nsw, nuw, and exact, putting them
after their associated opcodes rather than before. This makes them
a little easier to read.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77194 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-27 16:11:46 +00:00
Chris Lattner
a759135168 update testcase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77192 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-27 15:52:58 +00:00
Chris Lattner
abb477f663 put normal data into .data instead of .data.rel on elf systems.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77116 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-26 03:06:11 +00:00
Chris Lattner
30c4a3b9a8 finish simplifying DarwinTargetAsmInfo::SelectSectionForGlobal
for now.  Make the section switching directives more consistent
by not including \n and including \t for them all.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77107 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-26 01:24:18 +00:00
Chris Lattner
e3577da6d9 simplify DarwinTargetAsmInfo::SelectSectionForGlobal a bit
and make it more aggressive, we now put:

const int G2 __attribute__((weak)) = 42;

into the text (readonly) segment like gcc, previously we put
it into the data (readwrite) segment.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77104 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-26 00:51:36 +00:00
Bob Wilson
8bb9e48752 Add support for ARM Neon VREV instructions.
Patch by Anton Korzh, with some modifications from me.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77101 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-26 00:39:34 +00:00
Chris Lattner
10cf6a6a4b add the most expedient hack to fix PR4619, along with a testcase.
Thanks to Rafael for the great example.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77083 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-25 17:57:37 +00:00
Dan Gohman
19378d622e When attempting to sign-extend an addrec by interpreting
the step value as unsigned, the start value and the addrec
itself still need to be treated as signed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77078 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-25 16:03:30 +00:00
Chris Lattner
6dc82863a6 remove this test. It is currently failing because we now emit the string
on darwin with ".cstring" instead of ".section  __TEXT,__cstring".  They
are the same and the former is better.  Remove this because this is no longer
magic pixie dust in the frontend.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77055 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-25 07:31:51 +00:00
Dan Gohman
eb490a7aa3 Teach ScalarEvolution to make use of no-overflow flags when
analyzing add recurrences.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77034 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-25 01:22:26 +00:00
Evan Cheng
b140f4907c I've lost my mind. PR4572 has not been fixed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77031 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-25 01:11:46 +00:00
Evan Cheng
66ac53165e Change Thumb2 jumptable codegen to one that uses two level jumps:
Before:
      adr r12, #LJTI3_0_0
      ldr pc, [r12, +r0, lsl #2]
LJTI3_0_0:
      .long    LBB3_24
      .long    LBB3_30
      .long    LBB3_31
      .long    LBB3_32

After:
      adr r12, #LJTI3_0_0
      add pc, r12, +r0, lsl #2
LJTI3_0_0:
      b.w    LBB3_24
      b.w    LBB3_30
      b.w    LBB3_31
      b.w    LBB3_32

This has several advantages.
1. This will make it easier to optimize this to a TBB / TBH instruction +
   (smaller) table.
2. This eliminate the need for ugly asm printer hack to force the address
   into thumb addresses (bit 0 is one).
3. Same codegen for pic and non-pic.
4. This eliminate the need to align the table so constantpool island pass
   won't have to over-estimate the size.

Based on my calculation, the later is probably slightly faster as well since
ldr pc with shifter address is very slow. That is, it should be a win as long
as the HW implementation can do a reasonable job of branch predict the second
branch.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77024 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-25 00:33:29 +00:00
Evan Cheng
b2fa93dc1c Remove a duplicated test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77020 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-25 00:24:40 +00:00
Evan Cheng
caca2b659f Forgot this test earlier.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77007 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-24 22:42:45 +00:00
Evan Cheng
0bc116192d Fix these tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77006 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-24 22:42:22 +00:00
Eli Friedman
4e9bac3769 Fix assert assembling zero-argument constant GEP.
There's still a strict-aliasing violation here, but I don't feel like 
dealing with that right now...



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77005 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-24 21:56:17 +00:00
Eric Christopher
a1a491c094 Move insertps tests to sse41 combo test file, convert to filecheck
format and add an extract/insert test.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76994 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-24 19:24:26 +00:00
Evan Cheng
f631a68cf8 Convert a test to FileCheck.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76954 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-24 06:01:46 +00:00
Chris Lattner
013e6b6309 Remove SectionKind::Small*. This was only used on mips, and is apparently
a sad mistake that is regretted. :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76935 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-24 03:11:51 +00:00
Richard Osborne
e23e0976c7 Add tests for handling of globals and tls on the XCore. These currently fail
but pass when run against r76652.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76923 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-24 00:38:20 +00:00
Dan Gohman
d2cb3d2c32 Remove the IA-64 backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76920 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-24 00:30:09 +00:00
Evan Cheng
eee839dd3c Thumb2 does not allow the use of "pc" register as part of the load / store address.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76909 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-23 23:09:51 +00:00
Evan Cheng
d3d9d66dd2 Fix up ARM constant island pass for Thumb2.
Also fixed up code to fully use the SoImm field for ADR on ARM mode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76890 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-23 18:27:47 +00:00
Andreas Bolka
0dcde10f5e FileCheck'ize and expand LDA testcases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76880 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-23 15:56:53 +00:00
Chris Lattner
3cd526136a testcase for PR4590
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76868 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-23 06:07:59 +00:00
Chris Lattner
7b45fc51aa merge vector-casts-0.ll into vector-casts.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76864 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-23 05:33:39 +00:00
Chris Lattner
f98d253bc5 Make some existing optimizations that would only trigger on scalars
also apply to vectors.  This allows us to compile this:

#include <emmintrin.h>
__m128i a(__m128 a, __m128 b) { return a==a & b==b; }
__m128i b(__m128 a, __m128 b) { return a!=a | b!=b; }

to:

_a:
	cmpordps	%xmm1, %xmm0
	ret
_b:
	cmpunordps	%xmm1, %xmm0
	ret

with clang instead of to a ton of horrible code.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76863 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-23 05:32:17 +00:00