Commit Graph

111201 Commits

Author SHA1 Message Date
Adrian Prantl
6f059afde6 ARM/AArch64: Attach the FrameSetup MIFlag to CFI instructions.
Debug info marks the first instruction without the FrameSetup flag
as being the end of the function prologue. Any CFI instructions in the
middle of the function prologue would cause debug info to end the prologue
too early and worse, attach the line number of the CFI instruction, which
incidentally is often 0.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224294 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-16 00:20:49 +00:00
Colin LeMahieu
3a0f6b52db [Hexagon] Adding doubleword multiplies with and without accumulation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224293 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-16 00:07:24 +00:00
Michael Ilseman
f651477d66 Sink the isa into the assert
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224291 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-15 23:41:21 +00:00
Colin LeMahieu
b4838f6d59 [Hexagon] Adding halfword to doubleword multiplies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224289 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-15 23:29:37 +00:00
Colin LeMahieu
1240508dda [Hexagon] Adding logical-logical accumulation instructions and tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224288 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-15 23:19:07 +00:00
Sanjoy Das
574e01c32e Teach ScalarEvolution to exploit min and max expressions when proving
isKnownPredicate.

The motivation for this change is to optimize away checks in loops
like this:

    limit = min(t, len)
    for (i = 0 to limit)
      if (i >= len || i < 0) throw_array_of_of_bounds();
      a[i] = ...

Differential Revision: http://reviews.llvm.org/D6635



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224285 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-15 22:50:15 +00:00
Simon Pilgrim
2f7e202f27 Added missing tests for X86vzmovl folding. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224284 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-15 22:45:48 +00:00
JF Bastien
13c782674a x86: Emit LOCK prefix after DATA16
Summary: x86 allows either ordering for the LOCK and DATA16 prefixes, but using GCC+GAS leads to different code generation than using LLVM. This change matches the order that GAS emits the x86 prefixes when a semicolon isn't used in inline assembly (see tc-i386.c comment before define LOCK_PREFIX), and helps simplify tooling that operates on the instruction's byte sequence (such as NaCl's validator). This change shouldn't have any performance impact.

Test Plan: ninja check

Reviewers: craig.topper, jvoung

Subscribers: jfb, llvm-commits

Differential Revision: http://reviews.llvm.org/D6630

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224283 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-15 22:34:58 +00:00
Colin LeMahieu
5f702749c1 [Hexagon] Adding a number of additional multiply forms with tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224282 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-15 22:10:37 +00:00
Michael Ilseman
bc541ae238 Clean up warning about unused variable
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224281 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-15 21:47:09 +00:00
Matthias Braun
4151e89f1e Revert "LiveRangeCalc: Rewrite subrange calculation"
Revert until I find out why non-subreg enabled targets break.

This reverts commit 6097277eef.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224278 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-15 21:36:35 +00:00
Michael Ilseman
9f0d59ab46 Revert of r223763, in spirit.
r223763 was made to work around a temporary issue where a user of the
JIT was passing down a declaration (incorrectly). This shouldn't
occur, so assert rather than silently continue.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224277 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-15 21:36:29 +00:00
Mark Heffernan
b10837d169 Clarify HowFarToZero computation when the step is a positive power of two. Functionally this should be identical to the existing code except for the case where Step is maximally negative (eg, INT_MIN). We now punt in that one corner case to make reasoning about the code easier.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224274 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-15 21:19:53 +00:00
Colin LeMahieu
1eb5ad1ecd [Hexagon] Adding misc multiply encodings and tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224273 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-15 21:17:03 +00:00
Matthias Braun
6097277eef LiveRangeCalc: Rewrite subrange calculation
This changes subrange calculation to calculate subranges sequentially
instead of in parallel. The code is easier to understand that way and
addresses the code review issues raised about LiveOutData being
hard to understand/needing more comments by removing them :)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224272 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-15 21:16:21 +00:00
Colin LeMahieu
8e7359d3a7 [Hexagon] Adding doubleworld accumulating multiplies of halfwords.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224267 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-15 20:17:46 +00:00
Colin LeMahieu
f8396b83c6 [Hexagon] Adding accumulating half word multiplies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224266 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-15 20:10:28 +00:00
Colin LeMahieu
c3449d705b [Hexagon] Adding multiply with rnd/sat/rndsat
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224265 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-15 20:01:59 +00:00
Ahmed Bougacha
839ff70c7e [X86] And also test INSERTPS shuffle mask pretty-printing.
For r224260.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224264 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-15 19:47:35 +00:00
Matthias Braun
908d623dff LiveRangeCalc: use more range based for loops; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224263 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-15 19:40:46 +00:00
Colin LeMahieu
e9e8f1fe77 [Hexagon] Adding encoding bits for halfword multiplies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224261 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-15 19:22:07 +00:00
Ahmed Bougacha
77effd8d7e [X86] Also pretty-print shuffle mask for INSERTPS rm variants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224260 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-15 19:17:54 +00:00
Duncan P. N. Exon Smith
1ef70ff39b IR: Make metadata typeless in assembly
Now that `Metadata` is typeless, reflect that in the assembly.  These
are the matching assembly changes for the metadata/value split in
r223802.

  - Only use the `metadata` type when referencing metadata from a call
    intrinsic -- i.e., only when it's used as a `Value`.

  - Stop pretending that `ValueAsMetadata` is wrapped in an `MDNode`
    when referencing it from call intrinsics.

So, assembly like this:

    define @foo(i32 %v) {
      call void @llvm.foo(metadata !{i32 %v}, metadata !0)
      call void @llvm.foo(metadata !{i32 7}, metadata !0)
      call void @llvm.foo(metadata !1, metadata !0)
      call void @llvm.foo(metadata !3, metadata !0)
      call void @llvm.foo(metadata !{metadata !3}, metadata !0)
      ret void, !bar !2
    }
    !0 = metadata !{metadata !2}
    !1 = metadata !{i32* @global}
    !2 = metadata !{metadata !3}
    !3 = metadata !{}

turns into this:

    define @foo(i32 %v) {
      call void @llvm.foo(metadata i32 %v, metadata !0)
      call void @llvm.foo(metadata i32 7, metadata !0)
      call void @llvm.foo(metadata i32* @global, metadata !0)
      call void @llvm.foo(metadata !3, metadata !0)
      call void @llvm.foo(metadata !{!3}, metadata !0)
      ret void, !bar !2
    }
    !0 = !{!2}
    !1 = !{i32* @global}
    !2 = !{!3}
    !3 = !{}

I wrote an upgrade script that handled almost all of the tests in llvm
and many of the tests in cfe (even handling many `CHECK` lines).  I've
attached it (or will attach it in a moment if you're speedy) to PR21532
to help everyone update their out-of-tree testcases.

This is part of PR21532.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224257 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-15 19:07:53 +00:00
Michael Ilseman
9ecdca9115 Silence more static analyzer warnings.
Add in definedness checks for shift operators, null checks when
pointers are assumed by the code to be non-null, and explicit
unreachables.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224255 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-15 18:48:43 +00:00
Reid Kleckner
2a59b5ed2d Move mips1 tests to test/MC/Disassembler/Mips/mips1
This matches the pattern of the mips2 and 3 tests, as well as our normal
conventions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224254 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-15 17:56:02 +00:00
Vladimir Medic
77b6849e61 Add disassembler tests for mips3 platform. There are no functional changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224253 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-15 16:19:34 +00:00
Vladimir Medic
7dfda5887e Add disassembler tests for mips2 platform. There are no functional changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224252 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-15 15:58:20 +00:00
Vladimir Medic
6fe13a4f08 This is the first in a series of patches that add missing disassembler tests for mips platform. The patches are divided per version of mips CPU to keep the patches smaller and ease the review. There are no functional changes, code is changed only if new tests reveal a bug.This patch adds disassembler tests for mips1 CPU.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224251 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-15 15:22:33 +00:00
Aaron Ballman
bfba3894f3 Changing a cast from unsigned to uint64_t, should be NFC in practice.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224249 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-15 14:25:12 +00:00
Elena Demikhovsky
a8a374135b Added a test related to 224247 revision
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224248 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-15 14:14:10 +00:00
Elena Demikhovsky
2f6d42351a Sink store based on alias analysis
- by Ella Bolshinsky
The alias analysis is used define whether the given instruction
is a barrier for store sinking. For 2 identical stores, following
instructions are checked in the both basic blocks, to determine
whether they are sinking barriers.

http://reviews.llvm.org/D6420



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224247 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-15 14:09:53 +00:00
Michael Kuperstein
299e0d4c24 [X86] Break false dependencies before partial register updates when the source operand is in memory
Adds the various "rm" instruction variants into the list of instructions that have a partial register update. Also adds all variants of SQRTSD that were missing in the original list.

Differential Revision: http://reviews.llvm.org/D6620

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224246 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-15 13:18:21 +00:00
Suyog Sarda
4dcffed444 Typo Correction in Test Case. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224244 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-15 12:19:46 +00:00
Elena Demikhovsky
3f2027522c AVX-512: Added EXPAND instructions and intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224241 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-15 10:03:52 +00:00
Alexey Bataev
0bf492d3c1 Fix line mapping information in LLVM JIT profiling with Vtune
The line mapping information for dynamic code is reported incorrectly. It causes VTune to map LLVM generated code to source lines incorrectly. This patch fix this issue.
Patch by Denis Pravdin.
Differential Revision: http://reviews.llvm.org/D6603


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224229 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-15 04:45:43 +00:00
David Majnemer
1691fa27d7 ThreadLocal: Move Unix-specific code out of Support/ThreadLocal.cpp
Just a cleanup, no functionality change is intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224227 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-15 01:19:53 +00:00
David Majnemer
3acb2035ba StringPool: Cleanup typos in unittest comments
No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224226 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-15 01:04:49 +00:00
David Majnemer
1f59bf4441 ThreadLocal: Return a mutable pointer if templated with a non-const type
It makes more sense for ThreadLocal<const T>::get to return a const T*
and ThreadLocal<T>::get to return a T*.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224225 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-15 01:04:45 +00:00
Craig Topper
55c9dbf599 Use unique_ptr to remove explicit delete.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224224 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-15 00:40:07 +00:00
Elena Demikhovsky
1c3a1516f8 Loop Vectorizer minor changes in the code -
some comments, function names, identation.

Reviewed here: http://reviews.llvm.org/D6527


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224218 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-14 09:43:50 +00:00
David Majnemer
a53d2268a9 APInt: udivrem should use machine instructions for single-word APInts
This mirrors the behavior of APInt::udiv and APInt::urem.  Some
architectures, like X86, have a single instruction which can compute
both division and remainder.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224217 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-14 09:41:56 +00:00
David Majnemer
fabf5cc5d9 ScalarEvolution: Remove SCEVUDivision, it's unused
This is just a code simplification, no functionality change is intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224216 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-14 09:12:33 +00:00
Hal Finkel
0b19b561e0 [PowerPC] Handle cmp op promotion for SELECT[_CC] nodes in PPCTL::DAGCombineExtBoolTrunc
PPCTargetLowering::DAGCombineExtBoolTrunc contains logic to remove unwanted
truncations and extensions when dealing with nodes of the form:
  zext(binary-ops(binary-ops(trunc(x), trunc(y)), ...)

There was a FIXME in the implementation (now removed) regarding the fact that
the function would abort the transformations if any of the non-output operands
of a SELECT or SELECT_CC node would need to be promoted (because they were
also output operands, for example). As a result, we continued to generate
unnecessary zero-extends for code such as this:

  unsigned foo(unsigned a, unsigned b) {
    return  (a <= b) ? a : b;
  }

which would produce:

  cmplw 0, 3, 4
  isel 3, 4, 3, 1
  rldicl 3, 3, 0, 32
  blr

and now we produce:

  cmplw 0, 3, 4
  isel 3, 4, 3, 1
  blr

which is better in the obvious way.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224213 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-14 05:53:19 +00:00
Ahmed Bougacha
780a093afb Reapply "[ARM] Combine base-updating/post-incrementing vector load/stores."
r223862 tried to also combine base-updating load/stores.
r224198 reverted it, as "it created a regression on the test-suite
on test MultiSource/Benchmarks/Ptrdist/anagram by scrambling the order
in which the words are shown."
Reapply, with a fix to ignore non-normal load/stores.
Truncstores are handled elsewhere (you can actually write a pattern for
those, whereas for postinc loads you can't, since they return two values),
but it should be possible to also combine extloads base updates, by checking
that the memory (rather than result) type is of the same size as the addend.

Original commit message:
We used to only combine intrinsics, and turn them into VLD1_UPD/VST1_UPD
when the base pointer is incremented after the load/store.

We can do the same thing for generic load/stores.

Note that we can only combine the first load/store+adds pair in
a sequence (as might be generated for a v16f32 load for instance),
because other combines turn the base pointer addition chain (each
computing the address of the next load, from the address of the last
load) into independent additions (common base pointer + this load's
offset).

Differential Revision: http://reviews.llvm.org/D6585


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224203 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-13 23:22:12 +00:00
Renato Golin
1e173b7139 Revert "[ARM] Combine base-updating/post-incrementing vector load/stores."
This reverts commit r223862, as it created a regression on the test-suite
on test MultiSource/Benchmarks/Ptrdist/anagram by scrambling the order
in which the words are shown. We'll investigate the issue and re-apply
when safe.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224198 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-13 20:23:18 +00:00
Benjamin Kramer
71bb7d0925 Fix Doxygen command misspellings.
Found by -Wdocumentation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224197 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-13 19:19:07 +00:00
Aaron Ballman
eefc8cb6c0 Silencing a -Wsign-compare warning; NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224195 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-13 16:55:02 +00:00
Aaron Ballman
978aeec05a Silencing a *lot* of -Wsign-compare warnings; NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224194 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-13 16:53:15 +00:00
Craig Topper
1b40b342eb Use range-based for loops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224187 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-13 05:12:19 +00:00
Akira Hatanaka
ce9b37c087 Rename argument strings of codegen passes to avoid collisions with command line
options.

This commit changes the command line arguments (PassInfo::PassArgument) of two
passes, MachineFunctionPrinter and MachineScheduler, to avoid collisions with
command line options that have the same argument strings.

This bug manifests when the PassList construct (defined in opt.cpp) is used
in a tool that links with codegen passes. To reproduce the bug, paste the
following lines into llc.cpp and run llc.

#include "llvm/IR/LegacyPassNameParser.h"
static llvm:🆑:list<const llvm::PassInfo*, bool, llvm::PassNameParser>
PassList(llvm:🆑:desc("Optimizations available:"));

rdar://problem/19212448


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224186 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-13 04:52:04 +00:00