1290 Commits

Author SHA1 Message Date
Jeremy Morse
af14e77aab [DebugInfo][DAG] Process FrameIndex dbg.values unconditionally
A FrameIndex should be valid throughout a block regardless of what instructions
get selected in that block -- therefore we shouldn't harness dbg.values that
refer to FrameIndexes to an SDNode. There are numerous codegen reasons why
an SDNode never appears or doesn't become a location that a DBG_VALUE can
refer to. None of them actually affect the variable location.

Therefore, before any other tests to encode dbg_values in a SelectionDAG,
identify FrameIndex operands and encode them unattached to any SDNode.

Differential Revision: https://reviews.llvm.org/D57328


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352467 91177308-0d34-0410-b5e6-96231b3b80d8
2019-01-29 09:40:05 +00:00
James Y Knight
4922a5538e Fix emission of _fltused for MSVC.
It should be emitted when any floating-point operations (including
calls) are present in the object, not just when calls to printf/scanf
with floating point args are made.

The difference caused by this is very subtle: in static (/MT) builds,
on x86-32, in a program that uses floating point but doesn't print it,
the default x87 rounding mode may not be set properly upon
initialization.

This commit also removes the walk of the types pointed to by pointer
arguments in calls. (To assist in opaque pointer types migration --
eventually the pointee type won't be available.)

That latter implies that it will no longer consider a call like
`scanf("%f", &floatvar)` as sufficient to emit _fltused on its
own. And without _fltused, `scanf("%f")` will abort with error R6002. This
new behavior is unlikely to bite anyone in practice (you'd have to
read a float, and do nothing with it!), and also, is consistent with
MSVC.

Differential Revision: https://reviews.llvm.org/D56548

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352076 91177308-0d34-0410-b5e6-96231b3b80d8
2019-01-24 18:34:00 +00:00
Nirav Dave
a8d481282a [SelectionDAGBuilder] Simplify HasSideEffect calculation. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352067 91177308-0d34-0410-b5e6-96231b3b80d8
2019-01-24 17:56:03 +00:00
Nirav Dave
0cc297d24c [InlineAsm] Don't calculate registers for inline asm memory operands. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352066 91177308-0d34-0410-b5e6-96231b3b80d8
2019-01-24 17:47:18 +00:00
Nirav Dave
6f0bf08b56 [SelectionDAGBuilder] Fuse inline asm input operand loops passes. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352053 91177308-0d34-0410-b5e6-96231b3b80d8
2019-01-24 15:15:32 +00:00
Nirav Dave
465d30e524 [SelectionDAGBuilder] Defer C_Register Assignments to be in line with
those of C_RegisterClass. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351854 91177308-0d34-0410-b5e6-96231b3b80d8
2019-01-22 18:57:49 +00:00
Matt Arsenault
1f5f9eca96 Codegen support for atomicrmw fadd/fsub
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351851 91177308-0d34-0410-b5e6-96231b3b80d8
2019-01-22 18:36:06 +00:00
Chandler Carruth
6b547686c5 Update the file headers across all of the LLVM projects in the monorepo
to reflect the new license.

We understand that people may be surprised that we're moving the header
entirely to discuss the new license. We checked this carefully with the
Foundation's lawyer and we believe this is the correct approach.

Essentially, all code in the project is now made available by the LLVM
project under our new license, so you will see that the license headers
include that license only. Some of our contributors have contributed
code under our old license, and accordingly, we have retained a copy of
our old license notice in the top-level files in each project and
repository.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351636 91177308-0d34-0410-b5e6-96231b3b80d8
2019-01-19 08:50:56 +00:00
Nirav Dave
33cddcf204 [SelectionDAGBuilder] Cleanup InlineAsm Output generation. NFCI.
Defer inline asm's output fixup work until after we've generated the
inline asm node itself. Remove StoresToEmit, IndirectStoresToEmit, and
RetValRegs in favor of using ConstraintOperands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351558 91177308-0d34-0410-b5e6-96231b3b80d8
2019-01-18 15:57:13 +00:00
Florian Hahn
b4620a4948 [SelectionDAG] Add getTokenFactor, which splits nodes with > 64k operands.
This functionality is required at multiple places which potentially
create large operand lists, like SelectionDAGBuilder or DAGCombiner.

Differential Revision: https://reviews.llvm.org/D56739

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351552 91177308-0d34-0410-b5e6-96231b3b80d8
2019-01-18 14:05:59 +00:00
Florian Hahn
f55e902740 [SelectionDAG] Add static getMaxNumOperands function to SDNode.
Summary:
Use this helper to make sure we use the same value at various places.
This will likely be needed at more places were we currently crash
because we use more operands than possible.

Also makes it easier to change in the future.

Reviewers: RKSimon, craig.topper, efriedma, aemerson

Reviewed By: RKSimon

Subscribers: hiraditya, arsenm, llvm-commits

Differential Revision: https://reviews.llvm.org/D56859

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351537 91177308-0d34-0410-b5e6-96231b3b80d8
2019-01-18 10:00:38 +00:00
Mandeep Singh Grang
74aa5d8102 [COFF, ARM64] Implement support for SEH extensions __try/__except/__finally
Summary:
This patch supports MS SEH extensions __try/__except/__finally. The intrinsics localescape and localrecover are responsible for communicating escaped static allocas from the try block to the handler.

We need to preserve frame pointers for SEH. So we create a new function/property HasLocalEscape.

Reviewers: rnk, compnerd, mstorsjo, TomTan, efriedma, ssijaric

Reviewed By: rnk, efriedma

Subscribers: smeenai, jrmuizel, alex, majnemer, ssijaric, ehsan, dmajor, kristina, javed.absar, kristof.beyls, chrib, llvm-commits

Differential Revision: https://reviews.llvm.org/D53540

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351370 91177308-0d34-0410-b5e6-96231b3b80d8
2019-01-16 19:52:59 +00:00
Jeremy Morse
5af7a5a89b [DebugInfo] Allow creation of DBG_VALUEs in blocks where the operand is not used
dbg.value intrinsics can appear in blocks where their operand is not used,
meaning the operand never receives an SDNode, and thus no DBG_VALUE will
be created. Get around this by looking to see whether the operand has already
been allocated a virtual register. This allows dbg.values of Phi node and
Values that are used across basic blocks to successfully be translated into
DBG_VALUEs.

Differential Revision: https://reviews.llvm.org/D56678


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351358 91177308-0d34-0410-b5e6-96231b3b80d8
2019-01-16 17:25:27 +00:00
Nirav Dave
a42cde6841 [SelectionDAG] Check membership of register in class for single
register constraints. NFCI.

Now that X86's ST(7) constraints are fixed this check can be
reinstated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351207 91177308-0d34-0410-b5e6-96231b3b80d8
2019-01-15 17:09:23 +00:00
Nirav Dave
7cae0753be Reland "Refactor GetRegistersForValue. NFCI."
Remove over-strictification class membership check.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351074 91177308-0d34-0410-b5e6-96231b3b80d8
2019-01-14 17:09:45 +00:00
Martin Storsjo
4ad7a7e37f Revert "[SelectionDAGBuilder] Refactor GetRegistersForValue. NFCI."
This reverts commit r350841, as it actually had functional changes
and broke compilation. See PR40290.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@350921 91177308-0d34-0410-b5e6-96231b3b80d8
2019-01-11 07:31:17 +00:00
Nirav Dave
0c81e7aa76 [SelectionDAGBuilder] Refactor GetRegistersForValue. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@350841 91177308-0d34-0410-b5e6-96231b3b80d8
2019-01-10 16:25:47 +00:00
Nirav Dave
4a9e2193a3 [SelectionDAGBuilder] Fix formatting. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@350839 91177308-0d34-0410-b5e6-96231b3b80d8
2019-01-10 16:22:19 +00:00
Nirav Dave
6b347bc382 [SelectionDAGBuilder] Refactor visitInlineAsm. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@350837 91177308-0d34-0410-b5e6-96231b3b80d8
2019-01-10 16:18:18 +00:00
James Y Knight
719df2ec69 [opaque pointer types] Remove some calls to generic Type subtype accessors.
That is, remove many of the calls to Type::getNumContainedTypes(),
Type::subtypes(), and Type::getContainedType(N).

I'm not intending to remove these accessors -- they are
useful/necessary in some cases. However, removing the pointee type
from pointers would potentially break some uses, and reducing the
number of calls makes it easier to audit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@350835 91177308-0d34-0410-b5e6-96231b3b80d8
2019-01-10 16:07:20 +00:00
Ayonam Ray
81b403db29 Reversing the commit in revision 350186. Revision causes regression in 4
tests.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@350187 91177308-0d34-0410-b5e6-96231b3b80d8
2019-01-01 07:28:55 +00:00
Ayonam Ray
e3c665a0ab Omit range checks from jump tables when lowering switches with unreachable
default

During the lowering of a switch that would result in the generation of a jump
table, a range check is performed before indexing into the jump table, for the
switch value being outside the jump table range and a conditional branch is
inserted to jump to the default block. In case the default block is
unreachable, this conditional jump can be omitted. This patch implements
omitting this conditional branch for unreachable defaults.

Review Reference: D52002


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@350186 91177308-0d34-0410-b5e6-96231b3b80d8
2019-01-01 06:37:50 +00:00
George Burgess IV
c3cdffaac1 [SelectionDAGBuilder] Use ::precise LocationSizes; NFC
More migration so we can disable the implicit int -> LocationSize
conversion.

All of these are either scatter/gather'ed vector instructions, or direct
loads. Hence, they're all precise.

Perhaps if we see way more getTypeStoreSize calls, we can make a
getTypeStoreLocationSize (or similar) as a wrapper that applies this
::precise. Doesn't appear that it's a good idea to make getTypeStoreSize
return a LocationSize itself, however.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@350042 91177308-0d34-0410-b5e6-96231b3b80d8
2018-12-24 05:34:21 +00:00
Simon Pilgrim
0d758b2e70 [SelectionDAGBuilder] Enable funnel shift building to custom rotates
This patch enables funnel shift -> rotate building for all ROTL/ROTR custom/legal operations.

AFAICT X86 was the last target that was missing modulo support (PR38243), but I've tried to CC stakeholders for every target that has ROTL/ROTR custom handling for their final OK.

Differential Revision: https://reviews.llvm.org/D55747

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349765 91177308-0d34-0410-b5e6-96231b3b80d8
2018-12-20 14:56:44 +00:00
Pete Cooper
7c9e35df23 Rewrite objc intrinsics to runtime methods in PreISelIntrinsicLowering instead of SDAG.
SelectionDAG currently changes these intrinsics to function calls, but that won't work
for other ISel's.  Also we want to eventually support nonlazybind and weak linkage coming
from the front-end which we can't do in SelectionDAG.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349552 91177308-0d34-0410-b5e6-96231b3b80d8
2018-12-18 22:20:03 +00:00
Leonard Chan
8e3fdeb3b8 [Intrinsic] Signed Fixed Point Multiplication Intrinsic
Add an intrinsic that takes 2 signed integers with the scale of them provided
as the third argument and performs fixed point multiplication on them.

This is a part of implementing fixed point arithmetic in clang where some of
the more complex operations will be implemented as intrinsics.

Differential Revision: https://reviews.llvm.org/D54719

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348912 91177308-0d34-0410-b5e6-96231b3b80d8
2018-12-12 06:29:14 +00:00
Jeremy Morse
9a74554dbd [DebugInfo] Don't drop dbg.value's of nullptr
Currently, dbg.value's of "nullptr" are dropped when entering a SelectionDAG --
apparently just because of an oversight when recognising Values that are
constant (see PR39787). This patch adds ConstantPointerNull to the list of
constants that can be turned into DBG_VALUEs.

The matter of what bit-value a null pointer constant in LLVM has was raised
in this mailing list thread:

  http://lists.llvm.org/pipermail/llvm-dev/2018-December/128234.html

Where it transpires LLVM relies on (IR) null pointers being zero valued,
thus I've baked this assumption into the patch.

Differential Revision: https://reviews.llvm.org/D55227


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348753 91177308-0d34-0410-b5e6-96231b3b80d8
2018-12-10 12:04:08 +00:00
Pete Cooper
a81ba68b92 Follow-up from r348441 to add the rest of the objc ARC intrinsics.
This adds the other intrinsics used by ARC and codegen's them to their respective runtime methods.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348646 91177308-0d34-0410-b5e6-96231b3b80d8
2018-12-07 21:28:47 +00:00
Pete Cooper
184985589e Add objc.* ARC intrinsics and codegen them to their runtime methods.
Reviewers: erik.pilkington, ahatanak

Differential Revision: https://reviews.llvm.org/D55233

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348441 91177308-0d34-0410-b5e6-96231b3b80d8
2018-12-06 00:52:54 +00:00
Simon Pilgrim
67f4757dce [SelectionDAG] Initial support for FSHL/FSHR funnel shift opcodes (PR39467)
This is an initial patch to add a minimum level of support for funnel shifts to the SelectionDAG and to begin wiring it up to the X86 SHLD/SHRD instructions.

Some partial legalization code has been added to handle the case for 'SlowSHLD' where we want to expand instead and I've added a few DAG combines so we don't get regressions from the existing DAG builder expansion code.

Differential Revision: https://reviews.llvm.org/D54698

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348353 91177308-0d34-0410-b5e6-96231b3b80d8
2018-12-05 11:12:12 +00:00
Amara Emerson
cdd2e8326e [SelectionDAG] Split very large token factors for loads into 64k chunks.
There's a 64k limit on the number of SDNode operands, and some very large
functions with 64k or more loads can cause crashes due to this limit being hit
when a TokenFactor with this many operands is created. To fix this, create
sub-tokenfactors if we've exceeded the limit.

No test case as it requires a very large function.

rdar://45196621

Differential Revision: https://reviews.llvm.org/D55073

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348324 91177308-0d34-0410-b5e6-96231b3b80d8
2018-12-05 00:41:30 +00:00
Craig Topper
5018f6ea8f [SelectionDAG] Compute known bits and num sign bits for live out vector registers. Use it to add AssertZExt/AssertSExt in the live in basic blocks
Summary:
We already support this for scalars, but it was explicitly disabled for vectors. In the updated test cases this allows us to see the upper bits are zero to use less multiply instructions to emulate a 64 bit multiply.

This should help with this ispc issue that a coworker pointed me to https://github.com/ispc/ispc/issues/1362

Reviewers: spatel, efriedma, RKSimon, arsenm

Reviewed By: spatel

Subscribers: wdng, llvm-commits

Differential Revision: https://reviews.llvm.org/D54725

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@347287 91177308-0d34-0410-b5e6-96231b3b80d8
2018-11-20 04:30:26 +00:00
Cameron McInally
ca8cb6852b [IR] Add a dedicated FNeg IR Instruction
The IEEE-754 Standard makes it clear that fneg(x) and
fsub(-0.0, x) are two different operations. The former is a bitwise
operation, while the latter is an arithmetic operation. This patch
creates a dedicated FNeg IR Instruction to model that behavior.

Differential Revision: https://reviews.llvm.org/D53877



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346774 91177308-0d34-0410-b5e6-96231b3b80d8
2018-11-13 18:15:47 +00:00
James Y Knight
3125e35140 Add support for llvm.is.constant intrinsic (PR4898)
This adds the llvm-side support for post-inlining evaluation of the
__builtin_constant_p GCC intrinsic.

Also fixed SCCPSolver::visitCallSite to not blow up when seeing a call
to a function where canConstantFoldTo returns true, and one of the
arguments is a struct.

Updated from patch initially by Janusz Sobczak.

Differential Revision: https://reviews.llvm.org/D4276

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346322 91177308-0d34-0410-b5e6-96231b3b80d8
2018-11-07 15:24:12 +00:00
Cameron McInally
7c442634fa [FPEnv] Add constrained CEIL/FLOOR/ROUND/TRUNC intrinsics
Differential Revision: https://reviews.llvm.org/D53411



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346141 91177308-0d34-0410-b5e6-96231b3b80d8
2018-11-05 15:59:49 +00:00
Mandeep Singh Grang
08238b7fa9 [COFF, ARM64] Implement Intrinsic.sponentry for AArch64
Summary: This patch adds Intrinsic.sponentry. This intrinsic is required to correctly support setjmp for AArch64 Windows platform.

Patch by: Yin Ma (yinma@codeaurora.org)

Reviewers: mgrang, ssijaric, eli.friedman, TomTan, mstorsjo, rnk, compnerd, efriedma

Reviewed By: efriedma

Subscribers: efriedma, javed.absar, kristof.beyls, chrib, llvm-commits

Differential Revision: https://reviews.llvm.org/D53996

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345909 91177308-0d34-0410-b5e6-96231b3b80d8
2018-11-01 23:22:25 +00:00
Mandeep Singh Grang
fb61af32fa Revert "[COFF, ARM64] Implement Intrinsic.sponentry for AArch64"
This reverts commit 585b6667b4712e3c7f32401e929855b3313b4ff2.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345863 91177308-0d34-0410-b5e6-96231b3b80d8
2018-11-01 17:53:57 +00:00
Mandeep Singh Grang
585b6667b4 [COFF, ARM64] Implement Intrinsic.sponentry for AArch64
Summary: This patch adds Intrinsic.sponentry. This intrinsic is required to correctly support setjmp for AArch64 Windows platform.

Reviewers: mgrang, TomTan, rnk, compnerd, mstorsjo, efriedma

Reviewed By: efriedma

Subscribers: majnemer, chrib, javed.absar, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D53673

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345791 91177308-0d34-0410-b5e6-96231b3b80d8
2018-10-31 23:16:20 +00:00
Scott Linder
30005234d7 [SelectionDAG] Handle constant range [0,1) in lowerRangeToAssertZExt
lowerRangeToAssertZExt currently relies on something like EarlyCSE having
eliminated the constant range [0,1). At -O0 this leads to an assert.

Differential Revision: https://reviews.llvm.org/D53888


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345770 91177308-0d34-0410-b5e6-96231b3b80d8
2018-10-31 19:57:36 +00:00
Cameron McInally
3277e77bfd [FPEnv] [FPEnv] Add constrained intrinsics for MAXNUM and MINNUM
Differential Revision: https://reviews.llvm.org/D53216



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345650 91177308-0d34-0410-b5e6-96231b3b80d8
2018-10-30 21:01:29 +00:00
Leonard Chan
5aeb36fdcb [Intrinsic] Signed and Unsigned Saturation Subtraction Intirnsics
Add an intrinsic that takes 2 integers and perform saturation subtraction on
them.

This is a part of implementing fixed point arithmetic in clang where some of
the more complex operations will be implemented as intrinsics.

Differential Revision: https://reviews.llvm.org/D53783

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345512 91177308-0d34-0410-b5e6-96231b3b80d8
2018-10-29 16:54:37 +00:00
Heejin Ahn
397841e1d3 Reland "[WebAssembly] LSDA info generation"
Summary:
This adds support for LSDA (exception table) generation for wasm EH.
Wasm EH mostly follows the structure of Itanium-style exception tables,
with one exception: a call site table entry in wasm EH corresponds to
not a call site but a landing pad.

In wasm EH, the VM is responsible for stack unwinding. After an
exception occurs and the stack is unwound, the control flow is
transferred to wasm 'catch' instruction by the VM, after which the
personality function is called from the compiler-generated code. (Refer
to WasmEHPrepare pass for more information on this part.)

This patch:
- Changes wasm.landingpad.index intrinsic to take a token argument, to
make this 1:1 match with a catchpad instruction
- Stores landingpad index info and catch type info MachineFunction in
before instruction selection
- Lowers wasm.lsda intrinsic to an MCSymbol pointing to the start of an
exception table
- Adds WasmException class with overridden methods for table generation
- Adds support for LSDA section in Wasm object writer

Reviewers: dschuff, sbc100, rnk

Subscribers: mgorny, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D52748

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345345 91177308-0d34-0410-b5e6-96231b3b80d8
2018-10-25 23:55:10 +00:00
Thomas Lively
bbc2ea9b21 [NFC] Rename minnan and maxnan to minimum and maximum
Summary:
Changes all uses of minnan/maxnan to minimum/maximum
globally. These names emphasize that the semantic difference between
these operations is more than just NaN-propagation.

Reviewers: arsenm, aheejin, dschuff, javed.absar

Subscribers: jholewinski, sdardis, wdng, sbc100, jgravelle-google, jrtc27, atanasyan, llvm-commits

Differential Revision: https://reviews.llvm.org/D53112

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345218 91177308-0d34-0410-b5e6-96231b3b80d8
2018-10-24 22:49:55 +00:00
Sanjay Patel
3a1d78fddd [SelectionDAG] use 'match' to simplify code; NFC
Vector types are not possible here because this code only starts
matching from the scalar bool value of a conditional branch, but
this is another step towards completely removing the fake binop
queries for not/neg/fneg.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@345041 91177308-0d34-0410-b5e6-96231b3b80d8
2018-10-23 15:46:10 +00:00
Leonard Chan
152aae5d0d [Intrinsic] Unigned Saturation Addition Intrinsic
Add an intrinsic that takes 2 integers and perform unsigned saturation
addition on them.

This is a part of implementing fixed point arithmetic in clang where some of
the more complex operations will be implemented as intrinsics.

Differential Revision: https://reviews.llvm.org/D53340

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344971 91177308-0d34-0410-b5e6-96231b3b80d8
2018-10-22 23:08:40 +00:00
Krasimir Georgiev
4998e62d57 Revert "[WebAssembly] LSDA info generation"
This reverts commit r344575.
Newly introduced test eh-lsda.ll.test fails with use-after-free under
ASAN build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344639 91177308-0d34-0410-b5e6-96231b3b80d8
2018-10-16 18:50:09 +00:00
Leonard Chan
b325eb110c [Intrinsic] Signed Saturation Addition Intrinsic
Add an intrinsic that takes 2 integers and perform saturation addition on them.

This is a part of implementing fixed point arithmetic in clang where some of
the more complex operations will be implemented as intrinsics.

Differential Revision: https://reviews.llvm.org/D53053

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344629 91177308-0d34-0410-b5e6-96231b3b80d8
2018-10-16 17:35:41 +00:00
Heejin Ahn
2fa550c88a [WebAssembly] LSDA info generation
Summary:
This adds support for LSDA (exception table) generation for wasm EH.
Wasm EH mostly follows the structure of Itanium-style exception tables,
with one exception: a call site table entry in wasm EH corresponds to
not a call site but a landing pad.

In wasm EH, the VM is responsible for stack unwinding. After an
exception occurs and the stack is unwound, the control flow is
transferred to wasm 'catch' instruction by the VM, after which the
personality function is called from the compiler-generated code. (Refer
to WasmEHPrepare pass for more information on this part.)

This patch:
- Changes wasm.landingpad.index intrinsic to take a token argument, to
make this 1:1 match with a catchpad instruction
- Stores landingpad index info and catch type info MachineFunction in
before instruction selection
- Lowers wasm.lsda intrinsic to an MCSymbol pointing to the start of an
exception table
- Adds WasmException class with overridden methods for table generation
- Adds support for LSDA section in Wasm object writer

Reviewers: dschuff, sbc100, rnk

Subscribers: mgorny, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D52748

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344575 91177308-0d34-0410-b5e6-96231b3b80d8
2018-10-16 00:09:12 +00:00
Chandler Carruth
2aaf7228e0 [TI removal] Make variables declared as TerminatorInst and initialized
by `getTerminator()` calls instead be declared as `Instruction`.

This is the biggest remaining chunk of the usage of `getTerminator()`
that insists on the narrow type and so is an easy batch of updates.
Several files saw more extensive updates where this would cascade to
requiring API updates within the file to use `Instruction` instead of
`TerminatorInst`. All of these were trivial in nature (pervasively using
`Instruction` instead just worked).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344502 91177308-0d34-0410-b5e6-96231b3b80d8
2018-10-15 10:04:59 +00:00
Thomas Lively
6e3463c0eb [Intrinsic] Add llvm.minimum and llvm.maximum instrinsic functions
Summary:
These new intrinsics have the semantics of the `minimum` and `maximum`
operations specified by the latest draft of IEEE 754-2018. Unlike
llvm.minnum and llvm.maxnum, these new intrinsics propagate NaNs and
always treat -0.0 as less than 0.0. `minimum` and `maximum` lower
directly to the existing `fminnan` and `fmaxnan` ISel DAG nodes. It is
safe to reuse these DAG nodes because before this patch were only
emitted in situations where there were known to be no NaN arguments or
where NaN propagation was correct and there were known to be no zero
arguments. I know of only four backends that lower fminnan and
fmaxnan: WebAssembly, ARM, AArch64, and SystemZ, and each of these
lowers fminnan and fmaxnan to instructions that are compatible with
the IEEE 754-2018 semantics.

Reviewers: aheejin, dschuff, sunfish, javed.absar

Subscribers: kristof.beyls, dexonsmith, kristina, llvm-commits

Differential Revision: https://reviews.llvm.org/D52764

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344437 91177308-0d34-0410-b5e6-96231b3b80d8
2018-10-13 07:21:44 +00:00