Commit Graph

11 Commits

Author SHA1 Message Date
Matt Arsenault c0db9a7416 DAG: Change behavior of fminnum/fmaxnum nodes
Introduce new versions that follow the IEEE semantics
to help with legalization that may need quieted inputs.

There are some regressions from inserting unnecessary
canonicalizes when these are matched from fast math
fcmp + select which should be fixed in a future commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344914 91177308-0d34-0410-b5e6-96231b3b80d8
2018-10-22 16:27:27 +00:00
Matt Arsenault 8d00765ed1 AMDGPU: Fix test check line bugs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@338374 91177308-0d34-0410-b5e6-96231b3b80d8
2018-07-31 13:25:23 +00:00
Matt Arsenault 4525054673 AMDGPU: Make v2i16/v2f16 legal on VI
This usually results in better code. Fixes using
inline asm with short2, and also fixes having a different
ABI for function parameters between VI and gfx9.

Partially cleans up the mess used for lowering of the d16
operations. Making v4f16 legal will help clean this up more,
but this requires additional work.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332953 91177308-0d34-0410-b5e6-96231b3b80d8
2018-05-22 06:32:10 +00:00
Farhana Aleen a59291c1f6 [AMDGPU] performMinMaxCombine should not optimize patterns of vectors to min3/max3.
Summary: There are no packed instructions for min3 or max3. So, performMinMaxCombine should not optimize vectors of f16 to min3/max3.

Author: FarhanaAleen

Reviewed By: arsenm

Subscribers: llvm-commits, AMDGPU

Differential Revision: https://reviews.llvm.org/D45219

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329131 91177308-0d34-0410-b5e6-96231b3b80d8
2018-04-03 23:00:30 +00:00
Farhana Aleen d82ffe5dae Revert "MSG"
This reverts commit 9a0ce889d1.

This was committed by mistake.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329119 91177308-0d34-0410-b5e6-96231b3b80d8
2018-04-03 21:51:45 +00:00
Farhana Aleen 9a0ce889d1 MSG
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@329114 91177308-0d34-0410-b5e6-96231b3b80d8
2018-04-03 21:20:39 +00:00
Matt Arsenault f76a315172 AMDGPU: Fix min3/max3 combines for f16/i16
Fix missing instruction definitions for min3/max3.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303284 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-17 19:25:06 +00:00
Matt Arsenault d706d030af AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel
Currently the default C calling convention functions are treated
the same as compute kernels. Make this explicit so the default
calling convention can be changed to a non-kernel.

Converted with perl -pi -e 's/define void/define amdgpu_kernel void/'
on the relevant test directories (and undoing in one place that actually
wanted a non-kernel).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298444 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-21 21:39:51 +00:00
Matt Arsenault d019e8638a Enable FeatureFlatForGlobal on Volcanic Islands
This switches to the workaround that HSA defaults to
for the mesa path.

This should be applied to the 4.0 branch.

Patch by Vedran Miletić <vedran@miletic.net>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292982 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-24 22:02:15 +00:00
Changpeng Fang faf7289db3 AMDGPU/SI: Enable load-store-opt by default.
Summary: Enable load-store-opt by default, and update LIT tests.

Reviewers: arsenm

Differential Revision: http://reviews.llvm.org/D20694

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270894 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-26 19:35:29 +00:00
Tom Stellard 953c681473 R600 -> AMDGPU rename
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239657 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-13 03:28:10 +00:00