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138 Commits

Author SHA1 Message Date
Matt Arsenault
2d429b1091 GlobalISel: Implement fewerElementsVector for phi 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355048 91177308-0d34-0410-b5e6-96231b3b80d8
 2019-02-28 00:16:32 +00:00
Matt Arsenault
0d2ad48b33 GlobalISel: Implement moreElementsVector for phi 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355047 91177308-0d34-0410-b5e6-96231b3b80d8
 2019-02-28 00:01:05 +00:00
Matt Arsenault
453c7ee1c9 AMDGPU/GlobalISel: Fix bit ops for non-power-of-2 sizes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354825 91177308-0d34-0410-b5e6-96231b3b80d8
 2019-02-25 21:32:48 +00:00
Matt Arsenault
da91f4c26a AMDGPU/GlobalISel: Clamp max implicit_def elements 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354818 91177308-0d34-0410-b5e6-96231b3b80d8
 2019-02-25 20:46:06 +00:00
Matt Arsenault
f237196b1b AMDGPU/GlobalISel: Make phis legal 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354592 91177308-0d34-0410-b5e6-96231b3b80d8
 2019-02-21 15:48:13 +00:00
Matt Arsenault
4c14549b42 AMDGPU/GlobalISel: Fix bit count ops for non-power-of-2 types 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354587 91177308-0d34-0410-b5e6-96231b3b80d8
 2019-02-21 15:22:20 +00:00
Matt Arsenault
1b59f4c380 GlobalISel: Fix fewerElementsVector for ctlz with different result type 
Also complete the set of related operations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354480 91177308-0d34-0410-b5e6-96231b3b80d8
 2019-02-20 16:42:52 +00:00
Matt Arsenault
7e1a65dad5 GlobalISel: Implement moreElementsVector for g_insert results 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354477 91177308-0d34-0410-b5e6-96231b3b80d8
 2019-02-20 16:11:22 +00:00
Matt Arsenault
379689ce0c GlobalISel: Implement moreElementsVector for select 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354354 91177308-0d34-0410-b5e6-96231b3b80d8
 2019-02-19 17:03:09 +00:00
Matt Arsenault
406dc2a0d5 GlobalISel: Implement moreElementsVector for G_EXTRACT source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354348 91177308-0d34-0410-b5e6-96231b3b80d8
 2019-02-19 16:44:22 +00:00
Matt Arsenault
47f8b7cd25 GlobalISel: Implement moreElementsVector for bit ops 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354345 91177308-0d34-0410-b5e6-96231b3b80d8
 2019-02-19 16:30:19 +00:00
Matt Arsenault
b1b624d08a GlobalISel: Implement widenScalar for g_extract scalar results 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354293 91177308-0d34-0410-b5e6-96231b3b80d8
 2019-02-18 22:39:27 +00:00
Matt Arsenault
6f55bb14e6 GlobalISel: Add alignment to LegalityQuery MMOs 
This allows targets to specify the minimum alignment required for the
load/store.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354071 91177308-0d34-0410-b5e6-96231b3b80d8
 2019-02-14 22:41:09 +00:00
Matt Arsenault
217f03f322 AMDGPU/GlobalISel: Fix RegBankSelect for GEP. 
This is basically a pointer typed add, so shouldn't be any different.
This was assuming everything was an SGPR, which is not true.

Also cleanup legality for GEP. I don't seem to be seeing the problem
the hack marking s64 as a legal pointer type the comment mentions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354067 91177308-0d34-0410-b5e6-96231b3b80d8
 2019-02-14 22:24:28 +00:00
Matt Arsenault
bb8d9165a4 AMDGPU/GlobalISel: Only make f16 constants legal on f16 targets 
We could deal with it, but there's no real point.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353845 91177308-0d34-0410-b5e6-96231b3b80d8
 2019-02-12 14:54:55 +00:00
Matt Arsenault
f3f4691605 GlobalISel: Implement moreElementsVector for implicit_def 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353754 91177308-0d34-0410-b5e6-96231b3b80d8
 2019-02-11 22:00:39 +00:00
Matt Arsenault
c0665d4bcd GlobalISel: Add G_FCANONICALIZE instruction 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353719 91177308-0d34-0410-b5e6-96231b3b80d8
 2019-02-11 17:05:20 +00:00
Matt Arsenault
7772407272 AMDGPU/GlobalISel: Fix shift legalization for non-power-of-2 
clampScalar doesn't do anything for non-power-of-2 in range.
There should probably be a combination rule to reduce the number
of matching rules.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353526 91177308-0d34-0410-b5e6-96231b3b80d8
 2019-02-08 15:06:24 +00:00
Matt Arsenault
b997233527 AMDGPU/GlobalISel: Fix non-power-of-2 implicit_def 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353522 91177308-0d34-0410-b5e6-96231b3b80d8
 2019-02-08 14:46:27 +00:00
Matt Arsenault
4473e73049 AMDGPU/GlobalISel: Don't use a copy in addrspacecast lowering 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353516 91177308-0d34-0410-b5e6-96231b3b80d8
 2019-02-08 14:16:11 +00:00
Matt Arsenault
e6576d59f1 AMDGPU/GlobalISel: Legalize addrspacecast 
Use a placeholder constant for now on targets
that need the load from the queue ptr.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353497 91177308-0d34-0410-b5e6-96231b3b80d8
 2019-02-08 02:40:47 +00:00
Matt Arsenault
c0f816e09c GlobalISel: Implement narrowScalar for shift main type 
This is pretty much directly ported from SelectionDAG. Doesn't include
the shift by non-constant but known bits version, since there isn't a
globalisel version of computeKnownBits yet.

This shows a disadvantage of targets not specifically which type
should be used for the shift amount. If type 0 is legalized before
type 1, the operations on the shift amount type use the wider type
(which are also less likely to legalize). This can be avoided by
targets specifying legalization actions on type 1 earlier than for
type 0.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353455 91177308-0d34-0410-b5e6-96231b3b80d8
 2019-02-07 19:37:44 +00:00
Matt Arsenault
cceef2f736 AMDGPU/GlobalISel: Restrict g_implicit_def legality 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353452 91177308-0d34-0410-b5e6-96231b3b80d8
 2019-02-07 19:10:15 +00:00
Matt Arsenault
4bafedb149 AMDGPU/GlobalISel: Legalize fsqrt 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353438 91177308-0d34-0410-b5e6-96231b3b80d8
 2019-02-07 18:14:39 +00:00
Matt Arsenault
1faffeed21 AMDGPU/GlobalISel: Legalize some f16 operations 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353436 91177308-0d34-0410-b5e6-96231b3b80d8
 2019-02-07 18:03:11 +00:00
Matt Arsenault
f2e3c26215 GlobalISel: Implement fewerElementsVector for shifts 
Introduce a new function which handles instructions with multiple type
indices, but have the same number of vector elements.

Also legalize v2s16 shifts when applicable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353432 91177308-0d34-0410-b5e6-96231b3b80d8
 2019-02-07 17:38:00 +00:00
Matt Arsenault
7552163973 GlobalISel: Try to make legalize rules more useful for vectors 
Mostly keep the existing functions on scalars, but add versions which
also operate based on the vector element size.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353430 91177308-0d34-0410-b5e6-96231b3b80d8
 2019-02-07 17:25:51 +00:00
Matt Arsenault
cd93dd44c7 AMDGPU/GlobalISel: Legalize select for v4s16 
Also add some more select tests to help show future legalization
changes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353045 91177308-0d34-0410-b5e6-96231b3b80d8
 2019-02-04 14:04:52 +00:00
Fangrui Song
31b117619f [AMDGPU] Fix -Wunused-variable after rL352978 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352982 91177308-0d34-0410-b5e6-96231b3b80d8
 2019-02-03 03:51:52 +00:00
Matt Arsenault
c1923fc6c2 GlobalISel: Implement widenScalar for G_UNMERGE_VALUES 
For the scalar case only.

Also move the similar G_MERGE_VALUES handling to a separate function
and cleanup to make them look more similar.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352979 91177308-0d34-0410-b5e6-96231b3b80d8
 2019-02-03 00:07:33 +00:00
Matt Arsenault
757bd101c7 GlobalISel: Implement widenScalar for G_EXTRACT vector sources 
Handle the basic element extract case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352978 91177308-0d34-0410-b5e6-96231b3b80d8
 2019-02-02 23:56:00 +00:00
Matt Arsenault
ed82b5f274 AMDGPU/GlobalISel: Avoid reporting illegal extloads as legal 
This avoids breaking a test in a future commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352977 91177308-0d34-0410-b5e6-96231b3b80d8
 2019-02-02 23:39:13 +00:00
Matt Arsenault
ab06ef3e9b AMDGPU/GlobalISel: Legalize icmp for pointer types 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352976 91177308-0d34-0410-b5e6-96231b3b80d8
 2019-02-02 23:35:15 +00:00
Matt Arsenault
f9e63ee8f3 AMDGPU/GlobalISel: Legalize constant for pointer types 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352975 91177308-0d34-0410-b5e6-96231b3b80d8
 2019-02-02 23:33:49 +00:00
Matt Arsenault
b9ef526a07 AMDGPU/GlobalISel: Legalize select for pointer types 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352974 91177308-0d34-0410-b5e6-96231b3b80d8
 2019-02-02 23:31:50 +00:00
Matt Arsenault
87de283c8b GlobalISel: Legalization for inttoptr/ptrtoint 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352973 91177308-0d34-0410-b5e6-96231b3b80d8
 2019-02-02 23:29:55 +00:00
Matt Arsenault
2a852a1e74 GlobalISel: Handle odd splits in fewerElementsVector for load/store 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352720 91177308-0d34-0410-b5e6-96231b3b80d8
 2019-01-31 02:46:05 +00:00
Matt Arsenault
8927be488e GlobalISel: Implement narrowScalar for bswap 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352719 91177308-0d34-0410-b5e6-96231b3b80d8
 2019-01-31 02:34:03 +00:00
Matt Arsenault
d08f66450d GlobalISel: Allow bitcount ops to have different result type 
For AMDGPU the result is always 32-bit for 64-bit inputs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352717 91177308-0d34-0410-b5e6-96231b3b80d8
 2019-01-31 02:09:57 +00:00
Matt Arsenault
e405a3bd22 GlobalISel: Implement fewerElementsVector for select 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352601 91177308-0d34-0410-b5e6-96231b3b80d8
 2019-01-30 04:19:31 +00:00
Matt Arsenault
b59155ea9a AMDGPU/GlobalISel: Fix clamping shifts with 16-bit insts 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352599 91177308-0d34-0410-b5e6-96231b3b80d8
 2019-01-30 03:36:25 +00:00
Matt Arsenault
00f3241eeb GlobalISel: Support narrowScalar for uneven loads 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352594 91177308-0d34-0410-b5e6-96231b3b80d8
 2019-01-30 02:35:38 +00:00
Matt Arsenault
9fb9172b43 GlobalISel: Partially implement widenScalar for MERGE_VALUES 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352560 91177308-0d34-0410-b5e6-96231b3b80d8
 2019-01-29 23:17:35 +00:00
Matt Arsenault
ae17beb3c1 GlobalISel: Fix narrowScalar for load/store with different mem size 
This was ignoring the memory size, and producing multiple loads/stores
if the operand size was different from the memory size.

I assume this is the intent of not having an explicit G_ANYEXTLOAD
(although I think that would probably be better).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352523 91177308-0d34-0410-b5e6-96231b3b80d8
 2019-01-29 18:13:02 +00:00
Matt Arsenault
230bc3fabf GlobalISel: Implement narrowScalar for mul 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352300 91177308-0d34-0410-b5e6-96231b3b80d8
 2019-01-27 00:52:51 +00:00
Matt Arsenault
696da757ff GlobalISel: fewerElementsVector for intrinsic_trunc/intrinsic_round 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352298 91177308-0d34-0410-b5e6-96231b3b80d8
 2019-01-27 00:12:21 +00:00
Matt Arsenault
bc22426f2c AMDGPU/GlobalISel: Use scalarize instead of clampMaxNumElements 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352297 91177308-0d34-0410-b5e6-96231b3b80d8
 2019-01-26 23:54:53 +00:00
Matt Arsenault
d50257b91f AMDGPU/GlobalISel: Legalize more bit ops 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352295 91177308-0d34-0410-b5e6-96231b3b80d8
 2019-01-26 23:47:07 +00:00
Matt Arsenault
3c7fa48d5c AMDGPU/GlobalISel: Widen small uaddo/usubo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352294 91177308-0d34-0410-b5e6-96231b3b80d8
 2019-01-26 23:44:51 +00:00
Matt Arsenault
5e4ebdaab1 AMDGPU/GlobalISel: Remove leftover setAction 
Also move G_GEP actions together.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352168 91177308-0d34-0410-b5e6-96231b3b80d8
 2019-01-25 04:54:00 +00:00