Evan Cheng
f5e1dc278b
Renamed AddedCost to AddedComplexity.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27843 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-19 20:38:28 +00:00
Evan Cheng
5941320c0d
Allow "let AddedCost = n in" to increase pattern complexity.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27834 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-19 18:07:24 +00:00
Jim Laskey
8da17b242f
Add support for dwarf register numbering.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27080 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-24 21:13:21 +00:00
Chris Lattner
da10f19d5c
Shuffle some includes around
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27073 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-24 18:52:35 +00:00
Chris Lattner
a8309ae1cb
Split the valuetypes out of Target.td into ValueTypes.td
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26490 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-03 01:55:26 +00:00
Evan Cheng
f338dd881f
New type v2f32.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26435 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-01 01:06:22 +00:00
Evan Cheng
aea20f50e5
Added x86 integer vector types: 64-bit packed byte integer (v16i8), 64-bit
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packed word integer (v8i16), and 64-bit packed doubleword integer (v2i32).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26294 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-20 22:34:53 +00:00
Evan Cheng
19c9550744
Subtarget feature can now set any variable to any value
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25678 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-27 08:09:42 +00:00
Chris Lattner
cedc6f4b30
PHI and INLINEASM are now built-in instructions provided by Target.td
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25674 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-27 01:46:15 +00:00
Evan Cheng
6da8d99f70
New DAG node properties SNDPInFlag, SNDPOutFlag, and SNDPOptInFlag to replace
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hasInFlag, hasOutFlag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25155 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-09 18:28:21 +00:00
Evan Cheng
2b4ea795a2
Added field noResults to Instruction.
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Currently tblgen cannot tell which operands in the operand list are results so
it assumes the first one is a result. This is bad. Ideally we would fix this
by separating results from inputs, e.g. (res R32:$dst),
(ops R32:$src1, R32:$src2). But that's a more distruptive change. Adding
'let noResults = 1' is the workaround to tell tblgen that the instruction does
not produces a result. It works for now since tblgen does not support
instructions which produce multiple results.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25017 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-26 09:11:45 +00:00
Evan Cheng
171049d10f
* Removed the use of FLAG. Now use hasFlagIn and hasFlagOut instead.
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* Added a pseudo instruction (for each target) that represent "return void".
This is a workaround for lack of optional flag operand (return void is not
lowered so it does not have a flag operand.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24997 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-23 22:14:32 +00:00
Evan Cheng
58e84a69f5
Added support to specify predicates.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24715 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-14 22:02:59 +00:00
Evan Cheng
f8ac814957
* Added instruction property hasCtrlDep for those which r/w control-flow
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chains.
* Added DAG node property SDNPHasChain for nodes which r/w control-flow
chains.
* Renamed SDTVT to SDTOther.
* Added several new SDTypeProfiles for BR, BRCOND, RET, and WRITEPORT.
* Added SDNode definitions for BR, BRCOND, RET, and WRITEPORT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24586 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-04 08:13:17 +00:00
Nate Begeman
6510b22cec
Support multiple ValueTypes per RegisterClass, needed for upcoming vector
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work. This change has no effect on generated code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24563 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-01 04:51:06 +00:00
Nate Begeman
6a648614e8
Add the majority of the vector machien value types we expect to support,
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and make a few changes to the legalization machinery to support more than
16 types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24511 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-29 05:45:29 +00:00
Chris Lattner
eedf3b57cb
refix typo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24505 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-29 00:42:30 +00:00
Chris Lattner
46ec78646b
revert my change for the time being, which broke the build
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24503 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-29 00:24:08 +00:00
Chris Lattner
0ba7d71213
fix a typo :)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24501 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-28 22:42:15 +00:00
Chris Lattner
be7a2ff2dd
Capture more operand info, patch by Evan Cheng
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24422 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-19 07:00:10 +00:00
Nate Begeman
69a2cf421b
Also add the new vector value type here, for completeness.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24405 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-18 00:53:32 +00:00
Jim Laskey
f0c2be4d2b
Add attribute name and type to SubtargetFeatures.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24012 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-26 17:28:23 +00:00
Jim Laskey
f5fc2cbd6b
Plugin new subtarget backend into the build.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23870 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-21 19:05:19 +00:00
Jim Laskey
538421411a
Added InstrSchedClass to each of the PowerPC Instructions.
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Note that when adding new instructions that you should refer to the table at the
bottom of PPCSchedule.td.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23830 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-19 19:51:16 +00:00
Jim Laskey
0de8796e68
Push processor descriptions to the top of target and add command line info.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23820 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-19 13:34:52 +00:00
Chris Lattner
17f2cf05b3
Pull DAG ISel generation nodes out of the PowerPC backend to where they
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can be used by other targets. For those targets that want to use it,
have at. :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23680 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-10 06:00:30 +00:00
Chris Lattner
ccc8ed7bb5
Add a forward def
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23621 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-04 05:09:20 +00:00
Chris Lattner
ef242b1ccc
Now that self referential classes are supported, get rid of a work-around.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23544 91177308-0d34-0410-b5e6-96231b3b80d8
2005-09-30 04:13:23 +00:00
Chris Lattner
e3cbf823f0
spell this right
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23099 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-26 20:55:40 +00:00
Chris Lattner
0efa0f9ee9
Add a flag
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23092 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-26 20:29:01 +00:00
Chris Lattner
a64d4cddf5
add an enum value
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23048 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-25 17:07:09 +00:00
Chris Lattner
ecbce617ca
Split RegisterClass 'Methods' into MethodProtos and MethodBodies
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22929 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19 19:13:20 +00:00
Chris Lattner
1ff9540c17
Require that targets specify a namespace for their register classes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22921 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19 18:48:48 +00:00
Chris Lattner
329cdc3801
Add a new flag
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22881 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-18 23:17:07 +00:00
Chris Lattner
273f2280f2
Add some bits that can be set for instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19241 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-02 02:27:48 +00:00
Misha Brukman
99ee67ab19
Add isLittleEndianEncoding to InstrInfo class, defaults to `off'
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16976 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-14 05:53:40 +00:00
Chris Lattner
0fa206615a
Add initial support for variants
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16635 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-03 19:34:18 +00:00
Nate Begeman
8d5c50329b
Add support for the isLoad and isStore flags, needed by the instruction scheduler
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16555 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-28 21:29:00 +00:00
Chris Lattner
7baaf09f9f
Capture delay slot info
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16551 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-28 18:34:14 +00:00
Chris Lattner
b228657acc
Revamp the Register class, and allow the use of the RegisterGroup class to
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specify aliases directly in register definitions.
Patch contributed by Jason Eckhardt!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16330 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-14 04:17:02 +00:00
Chris Lattner
b4d83c1f2c
Add two values
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15959 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-21 02:17:39 +00:00
Chris Lattner
dd43e3493a
isdummyclass goes away
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15790 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-15 23:04:35 +00:00
Chris Lattner
9222cdeca0
disable all of the pattern isel stuff
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15788 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-15 23:02:34 +00:00
Chris Lattner
fa14683381
Add i1imm
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15753 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-15 05:37:00 +00:00
Chris Lattner
175580c0f3
Make the AsmWriter a first-class tblgen object. Allow targets to specify
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name of the generated asmwriter class, and the name of the format string.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15747 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-14 22:50:53 +00:00
Chris Lattner
52d2f14b3e
Fill out immediate operand classes, add a new Operand class
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15642 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 01:53:34 +00:00
Misha Brukman
8124020192
Remove ClassPrefix variable as it's no longer used.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15586 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-09 19:13:29 +00:00
Misha Brukman
665235b9df
Classes need to have a prefix name, so that they can be tacked on to the pieces
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that TableGen creates for them, e.g. CodeEmitter, AsmPrinter, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15579 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-09 17:46:06 +00:00
Chris Lattner
33c23ddf8a
Add some immediate forms, make name optional
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15401 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-01 09:36:44 +00:00
Chris Lattner
c139203f04
Add the 'ops' marker, add an AsmString initializer
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15383 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-01 04:40:43 +00:00