Duraid Madina
d47ae09dab
HP-UX DVDs are crunchy and good to eat
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25052 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-30 16:41:48 +00:00
Duraid Madina
42d24c71df
almost got the HP-UX tester up.. :)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25051 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-30 14:56:37 +00:00
Nate Begeman
b73628b5ab
Add support for generating v4i32 altivec code
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25046 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-30 00:12:56 +00:00
Duraid Madina
12f7578214
This gets most of the backends building with HP HappyC++.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25029 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-27 10:56:22 +00:00
Evan Cheng
2b4ea795a2
Added field noResults to Instruction.
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Currently tblgen cannot tell which operands in the operand list are results so
it assumes the first one is a result. This is bad. Ideally we would fix this
by separating results from inputs, e.g. (res R32:$dst),
(ops R32:$src1, R32:$src2). But that's a more distruptive change. Adding
'let noResults = 1' is the workaround to tell tblgen that the instruction does
not produces a result. It works for now since tblgen does not support
instructions which produce multiple results.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25017 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-26 09:11:45 +00:00
Duraid Madina
6fb9a84e79
more standards-compliance stuff
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25014 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-26 05:08:55 +00:00
Andrew Lenharth
330851a8f6
support targetexternalsym
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25005 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-24 23:36:59 +00:00
Evan Cheng
7b05bd5814
* Support for hasInFlag and hasOutFlag (on instructions). Remove nameless FLAG
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support which is fragile.
* Fixed a number of bugs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24996 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-23 22:11:47 +00:00
Chris Lattner
7a8054f5f2
silence some bogus gcc warnings
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24962 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-22 20:37:36 +00:00
Evan Cheng
3a217f3e53
Attempt to fix a crash on WIN32.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24936 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-22 02:35:21 +00:00
Evan Cheng
9793888be8
* Added support for FLAG - a special nameless flag register. Can be used as
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either an operand or a result.
* Fixed some more flag / chain bugs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24933 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-22 02:24:50 +00:00
Evan Cheng
87bddeb2af
Allows instructions which no explicit operands. e.g. X86 RET which has but
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an implicit flag operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24916 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-21 20:20:49 +00:00
Chris Lattner
4e6a1d2433
Eliminate some GCC warnings from the generated code
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24897 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-21 05:31:05 +00:00
Evan Cheng
5fb5e10cdc
Fix the semantic of Requires<[cond]> to mean if (!cond) goto PXXFail;
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24883 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-20 20:08:01 +00:00
Chris Lattner
2f0f9a6973
This ugly patch works around a GCC bug where it is compiling SelectCode to
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use too much stack space, overflowing the stack for large functions. Instead
of emitting new SDOperands in each match block, we emit some common ones at
the top of SelectCode then reuse them when possible.
This reduces the stack size of SelectCode from 28K to 21K. Note that GCC
compiles it to 512 bytes :-/
I've filed GCC PR 25505 to track this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24882 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-20 19:41:03 +00:00
Evan Cheng
4fba28116c
Now support instructions with implicit write to non-flag registers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24878 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-20 07:37:41 +00:00
Evan Cheng
e08705134f
Lefted out a fix in the previous check in.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24873 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-20 00:06:17 +00:00
Evan Cheng
f9fc25db32
Fix another bug related to chain / flag.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24868 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-19 22:40:04 +00:00
Evan Cheng
1b80f4d2c6
Fixes for a number of bugs: save flag results in CodeGenMap, folded chains
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may not all have ResNo == 0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24858 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-19 07:18:51 +00:00
Chris Lattner
5216c698de
Handle basic block nodes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24833 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 21:05:44 +00:00
Chris Lattner
dc464de9b0
More fixes for Selection of copyto/fromreg with a flag
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24829 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 15:45:51 +00:00
Chris Lattner
755dd09815
Select copytoreg and copyfromreg nodes that have flag operands correctly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24827 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 15:28:25 +00:00
Evan Cheng
bcecf33dc2
Support for read / write from explicit registers with FlagVT type.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24753 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 01:19:28 +00:00
Evan Cheng
58e84a69f5
Added support to specify predicates.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24715 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-14 22:02:59 +00:00
Evan Cheng
01f318bfca
Skip over srcvalue nodes when generating ISEL code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24704 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-14 02:21:57 +00:00
Evan Cheng
0e65b27e28
Bug fix: CodeGenMap[N] = ... -> CodeGenMap[N.getValue(0)] = ...
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24680 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-12 23:45:21 +00:00
Evan Cheng
481c8e0501
At top of generated isel SelectCode() is this:
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if (!N.Val->hasOneUse()) {
std::map<SDOperand, SDOperand>::iterator CGMI = CodeGenMap.find(N);
if (CGMI != CodeGenMap.end()) return CGMI->second;
}
Suppose a DAG like this:
X
^ ^
/ \
USE1 USE2
Suppose USE1 is being selected first and during which X is selected and
returned a new node. After this, USE1 is no longer an use of X. During USE2
selection, X will be selected again since it has only one use!
The fix is to always query CodeGenMap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24679 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-12 23:22:48 +00:00
Evan Cheng
8621789fcc
Bug fix: finding the correct incoming chain for pattern with nested src operand. And a minor change to make output code slightly more readible.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24669 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-12 19:37:43 +00:00
Nate Begeman
28a6b02626
Add support for TargetConstantPool nodes to the dag isel emitter, and use
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them in the PPC backend, to simplify some logic out of Select and
SelectAddr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24657 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-10 02:36:00 +00:00
Evan Cheng
ba7fa0b5d4
Stop emitting a redudant type check for complex pattern node.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24655 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-10 01:57:33 +00:00
Evan Cheng
1129e87ff4
For instructions which produce no result, e.g. store, chain's Resno == 0.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24652 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-10 00:09:17 +00:00
Chris Lattner
5b21be76e1
Add a new SDTCisPtrTy constraint, which indicates that an operand must have
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the same type as the pointer type for a target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24649 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-09 22:57:42 +00:00
Evan Cheng
b915f3110d
* Do not allow nodes which produce chain results (e.g. loads) to be folded if
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it has more than one real use (non-chain uses).
* Record folded chain producing node in CodeGenMap.
* Do not fold a chain producing node if it has already been selected as an
operand of a chain use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24647 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-09 22:45:35 +00:00
Evan Cheng
cbc09c8eaa
Prevent folding of instructions which produce chains that have more than 1 real use
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24643 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-09 06:06:08 +00:00
Evan Cheng
c45146ace5
* Make sure complex pattern operands are selected first since their select
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functions can return false and causing the instruction pattern match to fail.
* Code clean up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24642 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-09 00:48:42 +00:00
Evan Cheng
3aa39f439a
* Added an explicit type field to ComplexPattern.
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* Renamed MatchingNodes to RootNodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24636 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-08 02:14:08 +00:00
Evan Cheng
0fc7198890
Added support for ComplexPattern. These are patterns that require C++ pattern
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matching code that is not currently auto-generated by tblgen, e.g. X86
addressing mode. Selection routines for complex patterns can return multiple operands, e.g. X86 addressing mode returns 4.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24634 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-08 02:00:36 +00:00
Evan Cheng
dd304dd4bd
* Infer instruction property hasCtrlDep from pattern if it has one.
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* Fixed a bug related to hasCtrlDep property use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24610 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05 23:08:55 +00:00
Chris Lattner
22faeabb3a
Implement PR673: for explicit register references, use type information
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if available
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24597 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05 02:36:37 +00:00
Chris Lattner
5c4736a3da
Add some methods
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24596 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05 02:35:08 +00:00
Chris Lattner
7292c5ee32
Generate code to silence bogus GCC warnings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24593 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05 00:48:51 +00:00
Evan Cheng
1c3d19eb15
* Commit the fix (by Chris) for a tblgen type inferencing bug.
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* Enhanced tblgen to handle instructions which have chain operand and writes a
chain result.
* Enhanced tblgen to handle instructions which produces no results. Part of
the change is a temporary hack which relies on instruction property (e.g.
isReturn, isBranch). The proper fix would be to change the .td syntax to
separate results dag from ops dag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24587 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-04 08:18:16 +00:00
Nate Begeman
6510b22cec
Support multiple ValueTypes per RegisterClass, needed for upcoming vector
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work. This change has no effect on generated code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24563 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-01 04:51:06 +00:00
Evan Cheng
66a48bbc35
Teach tblgen to accept register source operands in patterns, e.g.
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def SHL8rCL : I<0xD2, MRM4r, (ops R8 :$dst, R8 :$src),
"shl{b} {%cl, $dst|$dst, %CL}",
[(set R8:$dst, (shl R8:$src, CL))]>, Imp<[CL],[]>;
This generates a CopyToReg operand and added its 2nd result to the shl as
a flag operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24557 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-01 00:18:45 +00:00
Nate Begeman
86193d1190
Nuke CodeGenInstruction's ValueType member, it is no longer used.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24556 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-01 00:12:04 +00:00
Nate Begeman
ddb395463c
Stop checking the ValueType of the CodeGenInstruction. Instead, use the
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ValueType from the RegisterClass or Operands. This step is necessary to
allow RegisterClasses to have multiple ValueTypes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24555 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-01 00:06:14 +00:00
Nate Begeman
8ef9d16d39
fit into 80 columns
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24554 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 23:58:18 +00:00
Chris Lattner
5d28ffdfec
Make the code generated by tblgen return the result of SelectNodeTo, to
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permit future changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24553 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 23:08:45 +00:00
Nate Begeman
391c5d231a
No longer track value types for asm printer operands, and remove them as
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an argument to every operand printing function. Requires some slight
tweaks to x86, the only user.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24541 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 18:54:35 +00:00
Nate Begeman
004a833ab8
Fix some copy and paste typos.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24540 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 18:37:14 +00:00