22772 Commits

Author SHA1 Message Date
Davide Italiano
dbdee033c3 [GlobalIsel] Fix a warning with GCC 7 -Wpedantic. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304174 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-29 20:13:22 +00:00
Sanjay Patel
cf2a64aaaf [DAGCombiner] fix load narrowing transform to exclude loads with extension
The extending load possibility was missed in:
https://reviews.llvm.org/rL304072

We might want to handle this cases as a follow-up, but bailing out for now
to avoid miscompiling.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304153 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-29 13:24:58 +00:00
Mehdi Amini
2ef4cb9ee0 DebugInfo: Include .dwo file name when hashing multiple CUs in a single file
This is really a workaround for ThinLTO in particular - since it can
import partial CUs that may end up looking very similar/the same as
the same partial import in another ThinLTO compile.

An alternative fix would be to change the DICompileUnit metadata to
include a "primary file" or the like - and when importing for ThinLTO
set the primary file to the name of the DICompileUnit that is being
imported into. This involves changing the schema and would reduce the
excessive uniqueness in the hash that this change creates - allowing
diagnosing of more duplicate CUs than will be caught with this change.

But duplicate CUs can still be caught in non-ThinLTO builds & are mostly
a nuisance rather than a particularly deliberate/effective tool for
finding broken code. (arguably the hash could always include the dwo
file and nothing in fission would break, I think..)

Reapply of r304119 after adding a triple to the test and moving it
to the X86 directory.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304130 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-29 06:32:34 +00:00
Mehdi Amini
d8c1a8e00d DebugInfo: Omit an empty CU when a subprogram was moved into its use
When the only use of a CU is for a subprogram that's only emitted into
the using CU (to avoid cross-CU references in DWO files), avoid creating
that CU at all.

Reapply of r304111 after adding a triple to the test and moving it
to the X86 directory.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304129 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-29 06:25:30 +00:00
Tobias Grosser
fb50bac10d Revert "[IfConversion] Keep the CFG updated incrementally in IfConvertTriangle"
The reverted change introdued assertions ala:

"MachineBasicBlock::succ_iterator
llvm::MachineBasicBlock::removeSuccessor(succ_iterator, bool): Assertion
`I != Successors.end() && "Not a current successor!"'

Mikael, the original committer, wrote me that he is working on a fix, but that
it likely will take some time to get this resolved. As this bug is one of the
last two issues that keep the AOSP buildbot from turning green, I revert the
original commit r302876.

I am looking forward to see this recommitted after the assertion has been
resolved.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304128 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-29 06:12:18 +00:00
Mehdi Amini
c91ffc6f56 Revert "DebugInfo: Omit an empty CU when a subprogram was moved into its use"
This reverts commit r304111.
GreenDragon is broken.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304126 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-29 05:17:57 +00:00
Mehdi Amini
138f19e1de Revert "DebugInfo: Include .dwo file name when hashing multiple CUs in a single file"
This reverts commit r304119 and r304118. GreenDragon is broken.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304125 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-29 05:17:54 +00:00
David Blaikie
266f4ffb5d DebugInfo: Include .dwo file name when hashing multiple CUs in a single file
This is really a workaround for ThinLTO in particular - since it can
import partial CUs that may end up looking very similar/the same as
the same partial import in another ThinLTO compile.

An alternative fix would be to change the DICompileUnit metadata to
include a "primary file" or the like - and when importing for ThinLTO
set the primary file to the name of the DICompileUnit that is being
imported into. This involves changing the schema and would reduce the
excessive uniqueness in the hash that this change creates - allowing
diagnosing of more duplicate CUs than will be caught with this change.

But duplicate CUs can still be caught in non-ThinLTO builds & are mostly
a nuisance rather than a particularly deliberate/effective tool for
finding broken code. (arguably the hash could always include the dwo
file and nothing in fission would break, I think..)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304119 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-29 00:48:45 +00:00
NAKAMURA Takumi
a505cdf463 Prune trailing whitespace. (To regenerate makefiles)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304112 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-28 22:54:25 +00:00
David Blaikie
22bea2c1f6 DebugInfo: Omit an empty CU when a subprogram was moved into its use
When the only use of a CU is for a subprogram that's only emitted into
the using CU (to avoid cross-CU references in DWO files), avoid creating
that CU at all.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304111 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-28 22:51:37 +00:00
Sanjay Patel
8cbe21fcdd [DAGCombiner] use narrow load to avoid vector extract
If we have (extract_subvector(load wide vector)) with no other users, 
that can just be (load narrow vector). This is intentionally conservative.
Follow-ups may loosen the one-use constraint to account for the extract cost
or just remove the one-use check.

The memop chain updating is based on code that already exists multiple times
in x86 lowering, so that should be pulled into a helper function as a follow-up.

Background: this is a potential improvement noticed via regressions caused by
making x86's peekThroughBitcasts() not loop on consecutive bitcasts (see 
comments in D33137).

Differential Revision: https://reviews.llvm.org/D33578


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304072 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-27 14:07:03 +00:00
Matthias Braun
7b853c5906 AArch64/PEI: Do not add reserved regs to liveins
We do not track liveness for reserved registers. It is unnecessary to
add them to block livein lists.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304059 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-27 03:38:02 +00:00
Matthias Braun
0248ff99fa ScheduleDAGInstrs: Fix fixupKills()
Rewrite fixupKills() to use the LivePhysRegs class. Simplifies the code
and fixes a bug where the CSR registers in return blocks where missed
leading to invalid kill flags. Also remove the unnecessary rule that we
wouldn't set kill flags on tied operands.

No tests as I have an upcoming commit improving MachineVerifier checks
to catch these cases in multiple existing lit tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304055 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-27 02:50:50 +00:00
Quentin Colombet
a407cc079c [GlobalISel] Add a localizer pass for target to use
This reverts commit r299287 plus clean-ups.

The localizer pass is a helper pass that could be run at O0 in the GISel
pipeline to work around the deficiency of the fast register allocator.
It basically shortens the live-ranges of the constants so that the
allocator does not spill all over the place.

Long term fix would be to make the greedy allocator fast.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304051 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-27 01:34:00 +00:00
Matthias Braun
c6a4b1a1de BranchRelaxation: computeLiveIns() after creating new block
One case in BranchRelaxation did not compute liveins after creating a
new block. This is catched by existing tests with an upcoming commit
that will improve MachineVerifier checking of livein lists.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304049 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-27 00:53:48 +00:00
Matthias Braun
7c75114e0e LivePhysRegs: Add default for removeRegsInMask(Clobbers); NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304036 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-26 21:50:51 +00:00
Matthias Braun
8fab6ef40d MachineVerifier: Remove unused set; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304035 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-26 21:50:48 +00:00
Benjamin Kramer
a0f27f968e Make helper functions static. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304029 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-26 20:09:00 +00:00
David Blaikie
06983057d0 DebugInfo: Do not emit empty CUs
Consistent with GCC and addresses a shortcoming with ThinLTO where many
imported CUs may end up being empty (because the functions imported from
them either ended up not being used (and were then discarded, since
they're imported as available_externally) or optimized away entirely).

Test cases previously testing empty CUs (either intentionally, or
because they didn't need anything more complicated) had a trivial 'int'
or similar basic type added to their retained types list.

This is a first order approximation - a deeper implementation could do
things like:

1) Be more lazy about construction of the CU - for example if two CUs
containing a single identical retained type are linked together, with
this change one of the two CUs will be produced but empty (since a
duplicate type won't be produced).

2) Go further and invert all the CU links the same way the subprogram
link is inverted - keep named CU lists of retained types, macros, etc,
and have those link back to the CU. Then if they're emitted, the CU is
emitted, but never otherwise - this would allow the metadata itself to
be dropped earlier too, though it seems unlikely that's an important
optimization as there shouldn't be many CUs relative to the number of
other entities.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304020 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-26 18:52:56 +00:00
David Blaikie
b66586857d DebugInfo: Don't include locations for debug-having code inlined into nodebug functions
This produced 'strange' DWARF anyway - the CU would have no ranges (or
at least not a range including the inlined code) nor any subprogram or
inlined_subroutine - yet the line table would have entries for these
instructions.

(this actually becomes more relevant with changes coming after this,
where a CU without any contents will be omitted entirely - so there
would be no line table to put this on anyway)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304004 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-26 17:05:15 +00:00
Matthias Braun
bfcbf6ad00 LivePhysRegs: Fix addLiveOutsNoPristines() for return blocks past PEI
Re-commit r303938 and r303954 with a fix for addLiveIns(): the internal
addPristines() function must be called on an empty set or it may
accidentally reset saved registers.

- addLiveOutsNoPristines() needs to add callee saved registers that are
  actually saved and restored somewhere to the set (they are not
  pristine).
- Cleanup/rewrite the code for addLiveOuts()/addLiveOutsNoPristines().

This fixes the problem from D32156.

Differential Revision: https://reviews.llvm.org/D32464

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304001 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-26 16:23:08 +00:00
Sanjay Patel
8f61a6eb1f [DAGCombiner] use narrow vector ops to eliminate concat/extract (PR32790)
In the best case:
extract (binop (concat X1, X2), (concat Y1, Y2)), N --> binop XN, YN
...we kill all of the extract/concat and just have narrow binops remaining.

If only one of the binop operands is amenable, this transform is still
worthwhile because we kill some of the extract/concat.

Optional bitcasting makes the code more complicated, but there doesn't
seem to be a way to avoid that.

The TODO about extending to more than bitwise logic is there because we really
will regress several x86 tests including madd, psad, and even a plain
integer-multiply-by-2 or shift-left-by-1. I don't think there's anything
fundamentally wrong with this patch that would cause those regressions; those
folds are just missing or brittle.

If we extend to more binops, I found that this patch will fire on at least one
non-x86 regression test. There's an ARM NEON test in
test/CodeGen/ARM/coalesce-subregs.ll with a pattern like:

            t5: v2f32 = vector_shuffle<0,3> t2, t4
          t6: v1i64 = bitcast t5
          t8: v1i64 = BUILD_VECTOR Constant:i64<0>
        t9: v2i64 = concat_vectors t6, t8
      t10: v4f32 = bitcast t9
    t12: v4f32 = fmul t11, t10
  t13: v2i64 = bitcast t12
t16: v1i64 = extract_subvector t13, Constant:i32<0>

There was no functional change in the codegen from this transform from what I
could see though.

For the x86 test changes:

1. PR32790() is the closest call. We don't reduce the AVX1 instruction count in that case,
   but we improve throughput. Also, on a core like Jaguar that double-pumps 256-bit ops,
   there's an unseen win because two 128-bit ops have the same cost as the wider 256-bit op.
   SSE/AVX2/AXV512 are not affected which is expected because only AVX1 has the extract/concat
   ops to match the pattern.
2. do_not_use_256bit_op() is the best case. Everyone wins by avoiding the concat/extract.
   Related bug for IR filed as: https://bugs.llvm.org/show_bug.cgi?id=33026
3. The SSE diffs in vector-trunc-math.ll are just scheduling/RA, so nothing real AFAICT.
4. The AVX1 diffs in vector-tzcnt-256.ll are all the same pattern: we reduced the instruction
   count by one in each case by eliminating two insert/extract while adding one narrower logic op.

https://bugs.llvm.org/show_bug.cgi?id=32790

Differential Revision: https://reviews.llvm.org/D33137



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303997 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-26 15:33:18 +00:00
Nirav Dave
f6ed90efa1 [DAG] Move legal type checks in store merge to be checked only
on non-legal cases. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303994 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-26 14:37:27 +00:00
John Brawn
bafb2e66d8 [ARM] Fix lowering of misaligned memcpy/memset
Currently getOptimalMemOpType returns i32 for large enough sizes without
checking for alignment, leading to poor code generation when misaligned accesses
aren't permitted as we generate a word store then later split it up into byte
stores. This means we inadvertantly go over the MaxStoresPerMemcpy limit and for
memset we splat the memset value into a word then immediately split it up
again.

Fix this by leaving it up to FindOptimalMemOpLowering to figure out which type
to use, but also fix a bug there where it wasn't correctly checking if
misaligned memory accesses are allowed.

Differential Revision: https://reviews.llvm.org/D33442


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303990 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-26 13:59:12 +00:00
Matthias Braun
b0e29ac6a6 LivePhysRegs: Skip reserved regs in computeLiveIns; NFCI
Re-commit r303937 + r303949 as they were not the cause for the build
failures.

We do not track liveness of reserved registers so adding them to the
liveins list in computeLiveIns() was completely unnecessary.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303970 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-26 06:32:31 +00:00
Matthias Braun
55d0a522c4 Revert "LivePhysRegs: Fix addLiveOutsNoPristines() for return blocks past PEI"
Tentatively revert this to see if it fixes the buildbot stage2
breakages.

This reverts commit r303938.
This reverts commit r303954.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303960 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-26 02:25:20 +00:00
Matthias Braun
bd265c3ec6 Revert "LivePhysRegs: Skip reserved regs in computeLiveIns; NFCI"
Tentatively revert, suspecting that it caused breakage in stage2
buildbots.

This reverts commit r303949.
This reverts commit r303937.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303955 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-26 01:29:32 +00:00
Matthias Braun
88351cb66e LivePhysRegs: Follow-up to r303937
We may have situations in which a superregister is reserved and not
added to liveins, so we have to add the subregisters.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303949 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-26 00:54:24 +00:00
Matthias Braun
dcf3dde852 LivePhysRegs: Fix addLiveOutsNoPristines() for return blocks past PEI
- addLiveOutsNoPristines() needs to add callee saved registers that are
  actually saved and restored somewhere to the set (they are not
  pristine).
- Cleanup/rewrite the code for addLiveOuts()/addLiveOutsNoPristines().

This fixes the problem from D32156.

Differential Revision: https://reviews.llvm.org/D32464

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303938 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-25 23:39:40 +00:00
Matthias Braun
b0019d8f2c LivePhysRegs: Skip reserved regs in computeLiveIns; NFCI
We do not track liveness of reserved registers so adding them to the
liveins list in computeLiveIns() was completely unnecessary.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303937 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-25 23:39:33 +00:00
David Blaikie
a8d58fe0ef DebugInfo: Simplify scopes+subprogram handling since the subprogram<>cu link inversion
Previously this code was defensive to the situation in which the debug
info scopes would lead to a different subprogram from the subprogram in
the CU's subprogram list (this could've happened with linkonce
functions, etc as per the comment being removed). Since the CU<>SP link
reversal this is no longer possible.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303933 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-25 23:11:28 +00:00
Andrew Kaylor
325c68628e Add constrained intrinsics for some libm-equivalent operations
Differential revision: https://reviews.llvm.org/D32319



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303922 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-25 21:31:00 +00:00
Matthias Braun
94c4904dc5 CodeGen: Rename DEBUG_TYPE to match passnames
Rename the DEBUG_TYPE to match the names of corresponding passes where
it makes sense. Also establish the pattern of simply referencing
DEBUG_TYPE instead of repeating the passname where possible.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303921 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-25 21:26:32 +00:00
Zachary Turner
522178bccc [CodeView Type Merging] Don't keep re-allocating temp serializer.
Previously, every time we wanted to serialize a field list record, we
would create a new copy of FieldListRecordBuilder, which would in turn
create a temporary instance of TypeSerializer, which itself had a
std::vector<> that was about 128K in size. So this 128K allocation was
happening every time. We can re-use the same instance over and over, we
just have to clear its internal hash table and seen records list between
each run. This saves us from the constant re-allocations.

This is worth an ~18.5% speed increase (3.75s -> 3.05s) in my tests.

Differential Revision: https://reviews.llvm.org/D33506

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303919 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-25 21:15:37 +00:00
Adrian Prantl
674c13e409 Fix SelectionDAGBuilder::getDbgValue to not expect DW_OP_deref on FI vars
This fixes an oversight in r300522, which changed alloca
dbg.values to no longer emit a DW_OP_deref.

The array.ll testcase was regenerated from source.

Fixes PR33166:
https://bugs.llvm.org/show_bug.cgi?id=33166

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303897 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-25 18:54:10 +00:00
David Blaikie
03e10d9460 DebugInfo: Produce debug_{gnu_}pub{names,types} entries when explicitly requested, even in -gmlt or when empty
Turns out gold doesn't use the DW_AT_GNU_pubnames to decide whether to
parse the rest of the DIEs when building gdb-index. This causes gold to
trip over LLVM's output when there are DW_FORM_ref_addr present.

Gold does use the presence of a debug_gnu_pub{names,types} entry for the
CU to skip parsing the debug_info portion, so make sure that's included
even when empty (technically, when empty there couldn't be any ref_addr
anyway - it only came up when gmlt didn't produce any (even non-empty)
pubnames - but given what that reveals about gold's implementation, this
seems like a good thing to do for consistency).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303894 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-25 18:50:28 +00:00
Eugene Zelenko
6463296227 [CodeGen] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303820 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-24 23:10:29 +00:00
Nirav Dave
3e49889dd5 [DAG] Prevent crashes when merging constant stores with high-bit set. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303802 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-24 19:56:39 +00:00
Mikael Holmen
3bfeab444d MachineCSE: Respect interblock physreg liveness
Summary:
This is a fix for PR32538. MachineCSE first looks at MO.isDead(), but
if it is not marked dead, MachineCSE still wants to do its own check
to see if it is trivially dead. This check for the trivial case
assumed that physical registers cannot be live out of a block.

Patch by Mattias Eriksson.

Reviewers: qcolombet, jbhateja

Reviewed By: qcolombet, jbhateja

Subscribers: jbhateja, llvm-commits

Differential Revision: https://reviews.llvm.org/D33408

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303731 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-24 09:35:23 +00:00
Tim Northover
f226a627f9 Revert LLVM changes for "Sema: allow imaginary constants via GNU extension if UDL overloads not present."
The changes accidentally crept into a Clang commit I was making.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303697 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-23 21:53:11 +00:00
Tim Northover
5be8b939f0 Sema: allow imaginary constants via GNU extension if UDL overloads not present.
C++14 added user-defined literal support for complex numbers so that you can
write something like "complex<double> val = 2i". However, there is an existing
GNU extension supporting this syntax and interpreting the result as a _Complex
type.

This changes parsing so that such literals are interpreted in terms of C++14's
operators if an overload is present but otherwise falls back to the original
GNU extension.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303694 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-23 21:41:49 +00:00
Francis Visoiu Mistrih
3a50f77d96 AsmPrinter: mark the beginning and the end of a function in verbose mode
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303690 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-23 21:22:16 +00:00
Nirav Dave
666fbb4259 [DAG] Add AddressSpace parameter to canMergeStoresTo. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303673 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-23 18:53:02 +00:00
David Blaikie
3a234a3d30 Fix DIEHash refactoring that dropped the DW_AT_name from the hash
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303669 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-23 18:36:07 +00:00
Nirav Dave
91b8ce247b [DAG] Add canMergeStoresTo predicate checks. NFCI.
Propagate canMergeStoresTo checks to missing cases in StoreMerge.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303668 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-23 18:33:09 +00:00
David Blaikie
e495804158 Refactor DWARF hashing to use a .def file to avoid repetition
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303666 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-23 18:27:09 +00:00
Florian Hahn
4cdd2e6d64 [AArch64] Make instruction fusion more aggressive.
Summary:
This patch makes instruction fusion more aggressive by
* adding artificial edges between the successors of FirstSU and
  SecondSU, similar to BaseMemOpClusterMutation::clusterNeighboringMemOps.
* updating PostGenericScheduler::tryCandidate to keep clusters together,
   similar to GenericScheduler::tryCandidate.

This change increases the number of AES instruction pairs generated on
 Cortex-A57 and Cortex-A72. This doesn't change code at all in
 most benchmarks or general code, but we've seen improvement on kernels
 using AESE/AESMC and AESD/AESIMC. 

Reviewers: evandro, kristof.beyls, t.p.northover, silviu.baranga, atrick, rengolin, MatzeB

Reviewed By: evandro

Subscribers: aemerson, rengolin, MatzeB, javed.absar, llvm-commits

Differential Revision: https://reviews.llvm.org/D33230

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303618 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-23 09:33:34 +00:00
Craig Topper
5e9f2d0f5d [KnownBits] Use !hasConflict() in asserts in place of Zero & One == 0 or similar. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303614 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-23 07:18:37 +00:00
Vitaly Buka
766824e844 [CodeGen] Fix uninitialized variables exposed by r303084
All other calls of analyzeBranch reset PredTBB and PredFBB, so I assume it's
expected behavior.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303581 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-22 21:33:54 +00:00
Adrian Prantl
14a1dd11de Don't generate line&scope debug info for meta-instructions.
MachineInstructions that don't generate any code (such as
IMPLICIT_DEFs) should not generate any debug info either.

Fixes PR33107.

https://bugs.llvm.org/show_bug.cgi?id=33107

This reapplies r303566 without any modifications. The stage2 build
failures persisted even after reverting this patch, and looking back
through history, it looks like these tests are flaky.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303575 91177308-0d34-0410-b5e6-96231b3b80d8
2017-05-22 20:47:09 +00:00