Commit Graph

30 Commits

Author SHA1 Message Date
Andrea Di Biagio 5041667657 [MCA] Further refactor the bottleneck analysis view. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362933 91177308-0d34-0410-b5e6-96231b3b80d8
2019-06-10 12:50:08 +00:00
Andrea Di Biagio c7117c0acd [MCA][Scheduler] Change how memory instructions are dispatched to the pending set. NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362302 91177308-0d34-0410-b5e6-96231b3b80d8
2019-06-01 15:22:37 +00:00
Andrea Di Biagio d80696cb37 [MCA] Refactor class LSUnit. NFCI
This should be the last bit of refactoring in preparation for a patch that would
finally fix PR37494.

This patch introduces the concept of memory dependency groups (class
MemoryGroup) and "Load/Store Unit token" (LSUToken) to track the status of a
memory operation.

A MemoryGroup is a node of a memory dependency graph. It is used internally to
classify memory operations based on the memory operations they depend on.  Let I
and J be two memory operations, we say that I and J equivalent (for the purpose
of mapping instructions to memory dependency groups) if the set of memory
operations they depend depend on is identical.

MemoryGroups are identified by so-called LSUToken (a unique group identifier
assigned by the LSUnit to every group). When an instruction I is dispatched to
the LSUnit, the LSUnit maps I to a group, and then returns a LSUToken.
LSUTokens are used by class Scheduler to track memory dependencies.

This patch simplifies the LSUnit interface and moves most of the implementation
details to its base class (LSUnitBase). There is no user visible change to the
output.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@361950 91177308-0d34-0410-b5e6-96231b3b80d8
2019-05-29 11:38:27 +00:00
Andrea Di Biagio 54b0b36a76 [MCA][Scheduler] Improved critical memory dependency computation.
This fixes a problem where back-pressure increases caused by register
dependencies were not correctly notified if execution was also delayed by memory
dependencies.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@361740 91177308-0d34-0410-b5e6-96231b3b80d8
2019-05-26 19:50:31 +00:00
Andrea Di Biagio a89881f31f [MCA] Refactor the logic that computes the critical memory dependency info. NFCI
CriticalRegDep has been renamed CriticalDependency, and it is now used by class
Instruction to store information about the critical register dependency and the
critical memory dependency. No functional change intendend.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@361737 91177308-0d34-0410-b5e6-96231b3b80d8
2019-05-26 18:41:35 +00:00
Andrea Di Biagio b07111f599 [MCA] Introduce class LSUnitBase and let LSUnit derive from it.
Class LSUnitBase provides a abstract interface for all the concrete LS units in
llvm-mca.

Methods exposed by the public abstract LSUnitBase interface are:
 - Status isAvailable(const InstRef&);
 - void dispatch(const InstRef &);
 - const InstRef &isReady(const InstRef &);

LSUnitBase standardises the API, but not the data structures internally used by
LS units. This allows for more flexibility.
Previously, only method `isReady()` was declared virtual by class LSUnit.
Also, derived classes had to inherit all the internal data members of LSUnit.

No functional change intended.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@361496 91177308-0d34-0410-b5e6-96231b3b80d8
2019-05-23 13:42:47 +00:00
Andrea Di Biagio 3055634df9 [MCA] Notify event listeners when instructions transition to the Pending state. NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359983 91177308-0d34-0410-b5e6-96231b3b80d8
2019-05-05 16:07:27 +00:00
Andrea Di Biagio 033c293996 [MCA] Highlight kernel bottlenecks in the summary view.
This patch adds a new flag named -bottleneck-analysis to print out information
about throughput bottlenecks.

MCA knows how to identify and classify dynamic dispatch stalls. However, it
doesn't know how to analyze and highlight kernel bottlenecks.  The goal of this
patch is to teach MCA how to correlate increases in backend pressure to backend
stalls (and therefore, the loss of throughput).

From a Scheduler point of view, backend pressure is a function of the scheduler
buffer usage (i.e. how the number of uOps in the scheduler buffers changes over
time). Backend pressure increases (or decreases) when there is a mismatch
between the number of opcodes dispatched, and the number of opcodes issued in
the same cycle.  Since buffer resources are limited, continuous increases in
backend pressure would eventually leads to dispatch stalls. So, there is a
strong correlation between dispatch stalls, and how backpressure changed over
time.

This patch teaches how to identify situations where backend pressure increases
due to:
 - unavailable pipeline resources.
 - data dependencies.

Data dependencies may delay execution of instructions and therefore increase the
time that uOps have to spend in the scheduler buffers. That often translates to
an increase in backend pressure which may eventually lead to a bottleneck.
Contention on pipeline resources may also delay execution of instructions, and
lead to a temporary increase in backend pressure.

Internally, the Scheduler classifies instructions based on whether register /
memory operands are available or not.

An instruction is marked as "ready to execute" only if data dependencies are
fully resolved.
Every cycle, the Scheduler attempts to execute all instructions that are ready
to execute. If an instruction cannot execute because of unavailable pipeline
resources, then the Scheduler internally updates a BusyResourceUnits mask with
the ID of each unavailable resource.

ExecuteStage is responsible for tracking changes in backend pressure. If backend
pressure increases during a cycle because of contention on pipeline resources,
then ExecuteStage sends a "backend pressure" event to the listeners.
That event would contain information about instructions delayed by resource
pressure, as well as the BusyResourceUnits mask.

Note that ExecuteStage also knows how to identify situations where backpressure
increased because of delays introduced by data dependencies.

The SummaryView observes "backend pressure" events and prints out a "bottleneck
report".

Example of bottleneck report:

```
Cycles with backend pressure increase [ 99.89% ]
Throughput Bottlenecks:
  Resource Pressure       [ 0.00% ]
  Data Dependencies:      [ 99.89% ]
   - Register Dependencies [ 0.00% ]
   - Memory Dependencies   [ 99.89% ]
```

A bottleneck report is printed out only if increases in backend pressure
eventually caused backend stalls.

About the time complexity:

Time complexity is linear in the number of instructions in the
Scheduler::PendingSet.

The average slowdown tends to be in the range of ~5-6%.
For memory intensive kernels, the slowdown can be significant if flag
-noalias=false is specified. In the worst case scenario I have observed a
slowdown of ~30% when flag -noalias=false was specified.

We can definitely recover part of that slowdown if we optimize class LSUnit (by
doing extra bookkeeping to speedup queries). For now, this new analysis is
disabled by default, and it can be enabled via flag -bottleneck-analysis. Users
of MCA as a library can enable the generation of pressure events through the
constructor of ExecuteStage.

This patch partially addresses https://bugs.llvm.org/show_bug.cgi?id=37494

Differential Revision: https://reviews.llvm.org/D58728


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355308 91177308-0d34-0410-b5e6-96231b3b80d8
2019-03-04 11:52:34 +00:00
Andrea Di Biagio ced11317f0 [MCA] Always check if scheduler resources are unavailable when reporting dispatch stalls.
Dispatch stall cycles may be associated to multiple dispatch stall events.
Before this patch, each stall cycle was associated with a single stall event.
This patch also improves a couple of code comments, and adds a helper method to
query the Scheduler for dispatch stalls.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354877 91177308-0d34-0410-b5e6-96231b3b80d8
2019-02-26 14:19:00 +00:00
Andrea Di Biagio 68782b8c5a [MCA][Scheduler] Collect resource pressure and memory dependency bottlenecks.
Every cycle, the Scheduler checks if instructions in the ReadySet can be issued
to the underlying pipelines. If an instruction cannot be issued because one or
more pipeline resources are unavailable, then field
Instruction::CriticalResourceMask is updated with the resource identifier of the
unavailable resources.

If an instruction cannot be promoted from the PendingSet to the ReadySet because
of a memory dependency, then field Instruction::CriticalMemDep is updated with
the identifier of the dependending memory instruction.

Bottleneck information is collected after every cycle for instructions that are
waiting to execute. The idea is to help identify causes of bottlenecks; this
information can be used in future to implement a bottleneck analysis.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354490 91177308-0d34-0410-b5e6-96231b3b80d8
2019-02-20 18:01:49 +00:00
Andrea Di Biagio a03cc695e7 [MCA][ResourceManager] Add a table that maps processor resource indices to processor resource identifiers.
This patch adds a lookup table to speed up resource queries in the ResourceManager.
This patch also moves helper function 'getResourceStateIndex()' from
ResourceManager.cpp to Support.h, so that we can reuse that logic in the
SummaryView (and potentially other views in llvm-mca).
No functional change intended.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354470 91177308-0d34-0410-b5e6-96231b3b80d8
2019-02-20 14:53:18 +00:00
Andrea Di Biagio 628018073d [MCA] Correctly update register definitions in the PRF after move elimination.
This patch fixes a bug where register writes performed by optimizable register
moves were sometimes wrongly treated like partial register updates.  Before this
patch, llvm-mca wrongly predicted a 1.50 IPC for test reg-move-elimination-6.s
(added by this patch).  With this patch, llvm-mca correctly updates the register
defintions in the PRF, and the IPC for that test is now correctly reported as 2.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354271 91177308-0d34-0410-b5e6-96231b3b80d8
2019-02-18 14:15:25 +00:00
Andrea Di Biagio 846a988299 [MCA] Slightly refactor method writeStartEvent in WriteState and ReadState. NFCI
This is another change in preparation for PR37494.
No functional change intended.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354261 91177308-0d34-0410-b5e6-96231b3b80d8
2019-02-18 11:27:11 +00:00
Andrea Di Biagio 8dbb778855 [MCA][LSUnit] Return the ID of the dependent memory operation from method
isReady(). NFCI

This is yet another change in preparation for a fix for PR37494.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@354150 91177308-0d34-0410-b5e6-96231b3b80d8
2019-02-15 18:05:59 +00:00
Andrea Di Biagio e9cd1e556a [MCA] Store a bitmask of used groups in the instruction descriptor.
This is to speedup 'checkAvailability' queries in class ResourceManager.
No functional change intended.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353949 91177308-0d34-0410-b5e6-96231b3b80d8
2019-02-13 14:56:06 +00:00
Andrea Di Biagio fcf88f08a2 [MCA][Scheduler] Use latency information to further classify busy instructions.
This patch introduces a new instruction stage named 'IS_PENDING'.
An instruction transitions from the IS_DISPATCHED to the IS_PENDING stage if
input registers are not available, but their latency is known.

This patch also adds a new set of instructions named 'PendingSet' to class
Scheduler. The idea is that the PendingSet will only contain instructions that
have reached the IS_PENDING stage.
By construction, an instruction in the PendingSet is only dependent on
instructions that have already reached the execution stage. The plan is to use
this knowledge to identify bottlenecks caused by data dependencies (see
PR37494).

Differential Revision: https://reviews.llvm.org/D58066


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353937 91177308-0d34-0410-b5e6-96231b3b80d8
2019-02-13 11:02:42 +00:00
Andrea Di Biagio b2b9806fed [MCA][Scheduler] Track resources that were found busy when issuing an instruction.
This is a follow up of r353706. When the scheduler fails to issue a ready
instruction to the underlying pipelines, it now updates a mask of 'busy resource
units'. That information will be used in future to obtain the set of
"problematic" resources in the case of bottlenecks caused by resource pressure.
No functional change intended.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353728 91177308-0d34-0410-b5e6-96231b3b80d8
2019-02-11 17:55:47 +00:00
Andrea Di Biagio 00bde103cd [MCA] Return a mask of busy resources from method ResourceManager::checkAvailability(). NFCI
In case of bottlenecks caused by pipeline pressure, we want to be able to
correctly report the set of problematic pipelines. This is a first step towards
adding support for bottleneck hints in llvm-mca (see PR37494). No functional
change intended.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353706 91177308-0d34-0410-b5e6-96231b3b80d8
2019-02-11 14:53:04 +00:00
Andrea Di Biagio 8dee531a48 [MCA] Speedup ResourceManager queries. NFCI
When a resource unit R is released, the ResourceManager notifies groups that
contain R. Before this patch, the logic in method ResourceManager::release()
implemented a potentially slow iterative search of dependent groups on the
entire set of processor resources.
This patch replaces that logic with a simpler (and often faster) lookup on array
`Resource2Groups`.  This patch gives an average speedup of ~3-4% (observed on a
release build when testing for target btver2).
No functional change intended.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353301 91177308-0d34-0410-b5e6-96231b3b80d8
2019-02-06 14:57:28 +00:00
Andrea Di Biagio 8bd15f83d0 [MCA] Moved the logic that updates register dependencies from DispatchStage to RegisterFile. NFC
DispatchStage should always delegate to an object of class RegisterFile the task
of updating data dependencies.  ReadState and WriteState objects should not be
modified directly by DispatchStage.
This patch also renames stage IS_AVAILABLE to IS_DISPATCHED.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353170 91177308-0d34-0410-b5e6-96231b3b80d8
2019-02-05 14:11:41 +00:00
Chandler Carruth 6b547686c5 Update the file headers across all of the LLVM projects in the monorepo
to reflect the new license.

We understand that people may be surprised that we're moving the header
entirely to discuss the new license. We checked this carefully with the
Foundation's lawyer and we believe this is the correct approach.

Essentially, all code in the project is now made available by the LLVM
project under our new license, so you will see that the license headers
include that license only. Some of our contributors have contributed
code under our old license, and accordingly, we have retained a copy of
our old license notice in the top-level files in each project and
repository.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351636 91177308-0d34-0410-b5e6-96231b3b80d8
2019-01-19 08:50:56 +00:00
Andrea Di Biagio 437f3bdb23 [MCA] Fix wrong definition of ResourceUnitMask in DefaultResourceStrategy.
Field ResourceUnitMask was incorrectly defined as a 'const unsigned' mask. It
should have been a 64 bit quantity instead. That means, ResourceUnitMask was
always implicitly truncated to a 32 bit quantity.
This issue has been found by inspection. Surprisingly, that bug was latent, and
it never negatively affected any existing upstream targets.

This patch fixes  the wrong definition of ResourceUnitMask, and adds a bunch of
extra debug prints to help debugging potential issues related to invalid
processor resource masks.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@350820 91177308-0d34-0410-b5e6-96231b3b80d8
2019-01-10 13:59:13 +00:00
Evandro Menezes bb50ac5e3f [llvm-mca] Display masks in hex
Display the resources masks as hexadecimal.  Otherwise, NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@350777 91177308-0d34-0410-b5e6-96231b3b80d8
2019-01-09 23:57:15 +00:00
Evandro Menezes 6fbbd583d5 [llvm-mca] Improve debugging (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@350661 91177308-0d34-0410-b5e6-96231b3b80d8
2019-01-08 22:29:38 +00:00
Andrea Di Biagio 7fccc80ce9 [MCA] Improved handling of in-order issue/dispatch resources.
Added field 'MustIssueImmediately' to the instruction descriptor of instructions
that only consume in-order issue/dispatch processor resources.
This speeds up queries from the hardware Scheduler, and gives an average ~5%
speedup on a release build.

No functional change intended.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@350397 91177308-0d34-0410-b5e6-96231b3b80d8
2019-01-04 15:08:38 +00:00
Andrea Di Biagio f7d3b9baa6 [MCA] Store extra information about processor resources in the ResourceManager.
Method ResourceManager::use() is responsible for updating the internal state of
used processor resources, as well as notifying resource groups that contain used
resources.

Before this patch, method 'use()' didn't know how to quickly obtain the set of
groups that contain a particular resource unit. It had to discover groups by
perform a potentially slow search (done by iterating over the set of processor
resource descriptors).

With this patch, the relationship between resource units and groups is stored in
the ResourceManager. That means, method 'use()' no longer has to search for
groups. This gives an average speedup of ~4-5% on a release build.

This patch also adds extra code comments in ResourceManager.h to better describe
the resource mask layout, and how resouce indices are computed from resource
masks.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@350387 91177308-0d34-0410-b5e6-96231b3b80d8
2019-01-04 12:31:14 +00:00
Andrea Di Biagio 2ae663f5c3 [MCA] Improve code comment and reuse an helper function in ResourceManager. NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@350322 91177308-0d34-0410-b5e6-96231b3b80d8
2019-01-03 14:47:46 +00:00
Andrea Di Biagio 2735936d0a [MCA] Minor refactoring of method DefaultResourceStrategy::select. NFCI
Common code used by the default resource strategy to select pipeline resources
has been moved to an helper function.

The new selection logic has been slightly rewritten to get rid of a redundant
zero check on the `ReadyMask` value. Before this patch, method select internally
called function `PowerOf2Floor` to compute the next ready pipeline resource.
However, `PowerOf2Floor` forces an implicit (redundant) zero check on the input
value. By construction, `ReadyMask` can never be zero. This patch replaces the
call to `PowerOf2Floor` with an equivalent block of code which avoids the
redundant zero check. This gives a minor 3-3.5% speedup on a release build.

No functional change intended.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@350218 91177308-0d34-0410-b5e6-96231b3b80d8
2019-01-02 15:40:52 +00:00
Evandro Menezes 9b284bbafd [llvm-mca] Dump mask in hex
Dump the resources masks as hexadecimal.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349536 91177308-0d34-0410-b5e6-96231b3b80d8
2018-12-18 20:45:50 +00:00
Clement Courbet 8178ac881e [llvm-mca] Move llvm-mca library to llvm/lib/MCA.
Summary: See PR38731.

Reviewers: andreadb

Subscribers: mgorny, javed.absar, tschuett, gbedwell, andreadb, RKSimon, llvm-commits

Differential Revision: https://reviews.llvm.org/D55557

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349332 91177308-0d34-0410-b5e6-96231b3b80d8
2018-12-17 08:08:31 +00:00