0203679424
[NFC][InstCombine] Shift amount reassociation: revisit flag preservation tests
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364657 91177308-0d34-0410-b5e6-96231b3b80d8
2019-06-28 16:36:53 +00:00
4f9b5abd8a
[NFC][InstCombine] Shift amount reassociation: add flag preservation test
...
As discussed in https://reviews.llvm.org/D63812#inline-569870
* exact on both lshr => exact https://rise4fun.com/Alive/plHk
* exact on both ashr => exact https://rise4fun.com/Alive/QDAA
* nuw on both shl => nuw https://rise4fun.com/Alive/5Uk
* nsw on both shl => nsw https://rise4fun.com/Alive/0plg
So basically if the same flag is set on both original shifts -> set it on new shift.
Don't think we can do anything with non-matching flags on shl.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364652 91177308-0d34-0410-b5e6-96231b3b80d8
2019-06-28 15:32:52 +00:00
696b128657
[InstCombine] remove 'tmp' names and regenerate checks; NFC
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364546 91177308-0d34-0410-b5e6-96231b3b80d8
2019-06-27 14:20:10 +00:00
987d44f326
[InstCombine][NFCI] Fix test comments.
...
For fold
(X & (signbit l>> Y)) ==/!= 0 -> (X << Y) >=/< 0
(X & (signbit << Y)) ==/!= 0 -> (X l>> Y) >=/< 0
Test cases of X being constant are positive tests not negative.
Prep work for D62818.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364497 91177308-0d34-0410-b5e6-96231b3b80d8
2019-06-27 05:46:06 +00:00
cc807d0b39
[InstCombine] change 'tmp' variable names; NFC
...
I don't think there was anything going wrong here,
but the auto-generating CHECK line script is known
to have problems with 'TMP' because it uses that
to match nameless values.
This is a retry of rL364452.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364477 91177308-0d34-0410-b5e6-96231b3b80d8
2019-06-26 21:19:31 +00:00
897d9b15ff
Revert [InstCombine] change 'tmp' variable names; NFC
...
This reverts r364452 (git commit 6083ae0b4a250c69f6d5b13b3742ee1fe5b878d5)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364455 91177308-0d34-0410-b5e6-96231b3b80d8
2019-06-26 18:06:51 +00:00
4451a1afc5
[InstCombine] change 'tmp' variable names; NFC
...
I don't think there was anything going wrong here,
but the auto-generating CHECK line script is known
to have problems with 'TMP' because it uses that
to match nameless values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364452 91177308-0d34-0410-b5e6-96231b3b80d8
2019-06-26 17:43:30 +00:00
1e9c5e4d8a
[InstCombine] regenerate test checks; NFC
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364437 91177308-0d34-0410-b5e6-96231b3b80d8
2019-06-26 15:24:08 +00:00
ee0ad15bc2
[NFC][InstCombine] Revisit one-use tests in shift-amount-reassociation-in-bittest.ll
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364433 91177308-0d34-0410-b5e6-96231b3b80d8
2019-06-26 14:42:39 +00:00
a32c72dc9f
[NFC][InstCombine] Add shift amount reassociation in bittest tests (PR42399)
...
https://bugs.llvm.org/show_bug.cgi?id=42399
https://rise4fun.com/Alive/kBb
https://rise4fun.com/Alive/1SB
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364430 91177308-0d34-0410-b5e6-96231b3b80d8
2019-06-26 14:24:41 +00:00
688a304aca
[NFC][InstCombine] Add shift amount reassociation tests (PR42391)
...
https://bugs.llvm.org/show_bug.cgi?id=42391
https://rise4fun.com/Alive/9E2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364393 91177308-0d34-0410-b5e6-96231b3b80d8
2019-06-26 08:17:05 +00:00
ab07556fab
[InstCombine] Simplify icmp ult/uge (shl %x, C2), C1 iff C1 is power of two -> icmp eq/ne (and %x, (lshr -C1, C2)), 0.
...
Simplify 'shl' inequality test into 'and' equality test.
This pattern happens in the middle-end while simplifying bitfield access,
Exposed in https://reviews.llvm.org/D63505
https://rise4fun.com/Alive/6uz
Reviewers: lebedev.ri, efriedma
Reviewed By: lebedev.ri
Subscribers: spatel, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63675
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364348 91177308-0d34-0410-b5e6-96231b3b80d8
2019-06-25 20:44:52 +00:00
08e75cad94
[InstCombine] reduce checks for power-of-2-or-zero using ctpop
...
This follows up the transform from rL363956 to use the ctpop intrinsic when checking for power-of-2-or-zero.
This is matching the isPowerOf2() patterns used in PR42314:
https://bugs.llvm.org/show_bug.cgi?id=42314
But there's at least 1 instcombine follow-up needed to match the alternate form:
(v & (v - 1)) == 0;
We should have all of the backend expansions handled with:
rL364319
(x86-specific changes still needed for optimal code based on subtarget)
And the larger patterns to exclude zero as a power-of-2 are joining with this change after:
rL364153 ( D63660 )
rL364246
Differential Revision: https://reviews.llvm.org/D63777
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364341 91177308-0d34-0410-b5e6-96231b3b80d8
2019-06-25 18:51:44 +00:00
52325a3618
[InstCombine][NFC] Add test to show missing fold for icmp ult/uge (shl %x, C2), C1.
...
Summary:
'shl' inequality test
```
icmp ult/uge (shl %x, C2), C1 iff C1 is power of two
```
can be simplified as 'and' equality test
```
icmp eq/ne (and %x, (lshr -C1, C2)), 0.
```
Reviewers: lebedev.ri, efriedma
Reviewed By: lebedev.ri
Subscribers: llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63670
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364256 91177308-0d34-0410-b5e6-96231b3b80d8
2019-06-25 00:14:02 +00:00
e4223f994b
[InstCombine] Fold icmp eq/ne (and %x, C), 0 iff (-C) is power of two -> %x u</u>= (-C) earlier.
...
Summary:
To generate simplified IR, make sure fold
(X & ~C) ==/!= 0 --> X u</u>= C+1
is scheduled before fold
((X << Y) & C) == 0 -> (X & (C >> Y)) == 0.
https://rise4fun.com/Alive/7ZN
Reviewers: lebedev.ri, efriedma, spatel, craig.topper
Reviewed By: lebedev.ri
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63505
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364255 91177308-0d34-0410-b5e6-96231b3b80d8
2019-06-25 00:09:10 +00:00
1c6a395c06
[InstCombine] squash is-not-power-of-2 using ctpop
...
This is the Demorgan'd 'not' of the pattern handled in:
D63660 / rL364153
This is another intermediate IR step towards solving PR42314:
https://bugs.llvm.org/show_bug.cgi?id=42314
We can test if a value is not a power-of-2 using ctpop(X) > 1,
so combining that with an is-zero check of the input is the
same as testing if not exactly 1 bit is set:
(X == 0) || (ctpop(X) u> 1) --> ctpop(X) != 1
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364246 91177308-0d34-0410-b5e6-96231b3b80d8
2019-06-24 22:35:26 +00:00
8146d2023c
InstCombine: Preserve nuw when reassociating nuw ops [3/3]
...
Alive says this is OK.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364235 91177308-0d34-0410-b5e6-96231b3b80d8
2019-06-24 21:37:03 +00:00
7b5347fa6b
InstCombine: Preserve nuw when reassociating nuw ops [2/3]
...
Alive says this is OK.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364234 91177308-0d34-0410-b5e6-96231b3b80d8
2019-06-24 21:37:02 +00:00
c110ca7e66
InstCombine: Preserve nuw when reassociating nuw ops [1/3]
...
Alive says this is OK.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364233 91177308-0d34-0410-b5e6-96231b3b80d8
2019-06-24 21:36:59 +00:00
3368d9da53
[InstCombine] add tests for more variants of isPowerOf2; NFC
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364227 91177308-0d34-0410-b5e6-96231b3b80d8
2019-06-24 20:11:40 +00:00
e702a1afad
[InstCombine] Regenerate test pr17827. NFCI.
...
Prep work for upcoming patch D63505.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364224 91177308-0d34-0410-b5e6-96231b3b80d8
2019-06-24 19:49:42 +00:00
0eaa3a2c7c
[InstCombine] reduce funnel-shift i16 X, X, 8 to bswap X
...
Prefer the more exact intrinsic to remove a use of the input value
and possibly make further transforms easier (we will still need
to match patterns with funnel-shift of wider types as pieces of
bswap, especially if we want to canonicalize to funnel-shift with
constant shift amount). Discussed in D46760.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364187 91177308-0d34-0410-b5e6-96231b3b80d8
2019-06-24 15:20:49 +00:00
cee72c8957
[InstCombine] add tests for funnel-shift to bswap; NFC
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364184 91177308-0d34-0410-b5e6-96231b3b80d8
2019-06-24 14:47:02 +00:00
31269a0a08
[InstCombine] SliceUpIllegalIntegerPHI - bail on out of range shifts
...
trunc(lshr) handling - if the shift is out of range (undefined) then bail like we do for non-constant shifts.
Fixes OSS Fuzz #15217
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364181 91177308-0d34-0410-b5e6-96231b3b80d8
2019-06-24 13:13:36 +00:00
3c6fdf0329
[InstCombine] squash is-power-of-2 that uses ctpop
...
This is another intermediate IR step towards solving PR42314:
https://bugs.llvm.org/show_bug.cgi?id=42314
We can test if a value is power-of-2-or-0 using ctpop(X) < 2,
so combining that with a non-zero check of the input is the
same as testing if exactly 1 bit is set:
(X != 0) && (ctpop(X) u< 2) --> ctpop(X) == 1
Differential Revision: https://reviews.llvm.org/D63660
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364153 91177308-0d34-0410-b5e6-96231b3b80d8
2019-06-23 14:22:37 +00:00
e03aa0dc47
[NFC] Update shl-sub tests
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364083 91177308-0d34-0410-b5e6-96231b3b80d8
2019-06-21 17:51:18 +00:00
45d1247849
[InstCombine] add tests for ctpop folds; NFC
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364082 91177308-0d34-0410-b5e6-96231b3b80d8
2019-06-21 17:44:09 +00:00
9acb0ea225
[InstCombine] (1 << (C - x)) -> ((1 << C) >> x) if C is bitwidth - 1
...
Summary:
```
%a = sub i32 31, %x
%r = shl i32 1, %a
=>
%d = shl i32 1, 31
%r = lshr i32 %d, %x
Done: 1
Optimization is correct!
```
https://rise4fun.com/Alive/btZm
Reviewers: spatel, lebedev.ri, nikic
Reviewed By: lebedev.ri
Subscribers: llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63652
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364073 91177308-0d34-0410-b5e6-96231b3b80d8
2019-06-21 16:25:32 +00:00
50b6b86763
[NFC] Added more tests for D63652
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364069 91177308-0d34-0410-b5e6-96231b3b80d8
2019-06-21 16:14:13 +00:00
6e11f192fc
[InstCombine] cttz(abs(x)) -> cttz(x)
...
Summary: Signedness does not change number of trailing zeros.
Reviewers: spatel, lebedev.ri, nikic
Reviewed By: lebedev.ri
Differential Revision: https://reviews.llvm.org/D63546
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364064 91177308-0d34-0410-b5e6-96231b3b80d8
2019-06-21 15:26:22 +00:00
b95193a53a
[NFC] Added tests for (1 << (C - x)) -> ((1 << C) >> x)
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364060 91177308-0d34-0410-b5e6-96231b3b80d8
2019-06-21 15:00:31 +00:00
d6e94a8c32
[NFC] Updated tests for D63546
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363967 91177308-0d34-0410-b5e6-96231b3b80d8
2019-06-20 19:30:56 +00:00
0e1f2dd708
[InstCombine] canonicalize check for power-of-2
...
The form that compares against 0 is better because:
1. It removes a use of the input value.
2. It's the more standard form for this pattern: https://graphics.stanford.edu/~seander/bithacks.html#DetermineIfPowerOf2
3. It results in equal or better codegen (tested with x86, AArch64, ARM, PowerPC, MIPS).
This is a root cause for PR42314, but probably doesn't completely answer the codegen request:
https://bugs.llvm.org/show_bug.cgi?id=42314
Alive proof:
https://rise4fun.com/Alive/9kG
Name: is power-of-2
%neg = sub i32 0, %x
%a = and i32 %neg, %x
%r = icmp eq i32 %a, %x
=>
%dec = add i32 %x, -1
%a2 = and i32 %dec, %x
%r = icmp eq i32 %a2, 0
Name: is not power-of-2
%neg = sub i32 0, %x
%a = and i32 %neg, %x
%r = icmp ne i32 %a, %x
=>
%dec = add i32 %x, -1
%a2 = and i32 %dec, %x
%r = icmp ne i32 %a2, 0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363956 91177308-0d34-0410-b5e6-96231b3b80d8
2019-06-20 17:41:15 +00:00
e392e54cc9
[InstCombine] cttz(-x) -> cttz(x)
...
Summary: Signedness does not change number of trailing zeros.
Reviewers: spatel, lebedev.ri, nikic
Reviewed By: spatel
Subscribers: llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63534
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363951 91177308-0d34-0410-b5e6-96231b3b80d8
2019-06-20 17:04:14 +00:00
9af3d6f06f
[InstCombine] add commuted variants for power-of-2 checks; NFC
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363945 91177308-0d34-0410-b5e6-96231b3b80d8
2019-06-20 16:27:23 +00:00
11c1e438db
[InstCombine] add tests for checking power-of-2; NFC
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363938 91177308-0d34-0410-b5e6-96231b3b80d8
2019-06-20 15:25:18 +00:00
3104139a5b
[InstCombine] Fold icmp eq/ne (and %x, signbit), 0 -> %x s>=/s< 0 earlier
...
Summary:
To generate simplified IR, make sure fold
```
(X & signbit) ==/!= 0) -> X s>=/s< 0;
```
is scheduled before fold
```
((X << Y) & C) == 0 -> (X & (C >> Y)) == 0.
```
https://rise4fun.com/Alive/fbdh
Reviewers: lebedev.ri, efriedma, spatel, craig.topper
Reviewed By: lebedev.ri
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63026
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363845 91177308-0d34-0410-b5e6-96231b3b80d8
2019-06-19 17:31:39 +00:00
a8650efa91
[NFC] Added tests for D63534
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363796 91177308-0d34-0410-b5e6-96231b3b80d8
2019-06-19 12:59:37 +00:00
61f7a16bfa
[NFC] Added tests for cttz(abs(x)) -> cttz(x) fold
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363795 91177308-0d34-0410-b5e6-96231b3b80d8
2019-06-19 12:55:39 +00:00
437ebb9c6e
InstCombine: Pre-commit test for reassociating nuw
...
D39417
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363741 91177308-0d34-0410-b5e6-96231b3b80d8
2019-06-18 21:32:51 +00:00
55ce7b4ea9
AMDGPU: Fold readlane/readfirstlane calls
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363587 91177308-0d34-0410-b5e6-96231b3b80d8
2019-06-17 17:52:35 +00:00
14dc077c20
AMDGPU: Mark exp/exp.compr as inaccessiblememonly
...
Should also be marked writeonly, but I think that would require
splitting the version with done set to a separate intrinsic
Test change is only from renumbering the attribute group numbers,
which for some reason the generated check lines consider.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363560 91177308-0d34-0410-b5e6-96231b3b80d8
2019-06-17 13:52:24 +00:00
1002960b9d
[lit] Delete empty lines at the end of lit.local.cfg NFC
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363538 91177308-0d34-0410-b5e6-96231b3b80d8
2019-06-17 09:51:07 +00:00
d09f140cd1
[InstSimplify] Fix addo/subo undef folds (PR42209)
...
Fix folds of addo and subo with an undef operand to be:
`@llvm.{u,s}{add,sub}.with.overflow` all fold to `{ undef, false }`,
as per LLVM undef rules.
Same for commuted variants.
Based on the original version of the patch by @nikic.
Fixes [[ https://bugs.llvm.org/show_bug.cgi?id=42209 | PR42209 ]]
Differential Revision: https://reviews.llvm.org/D63065
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363522 91177308-0d34-0410-b5e6-96231b3b80d8
2019-06-16 20:39:45 +00:00
34a27682ed
[InstCombine] Add tests to show missing fold opportunity for "icmp and shift" (nfc).
...
Summary:
For icmp pred (and (sh X, Y), C), 0
When C is signbit, expect to fold (X << Y) & signbit ==/!= 0 into (X << Y) >=/< 0,
rather than (X & (signbit >> Y)) != 0.
When C+1 is power of 2, expect to fold (X << Y) & ~C ==/!= 0 into (X << Y) </>= C+1,
rather than (X & (~C >> Y)) == 0.
For icmp pred (and X, (sh signbit, Y)), 0
Expect to fold (X & (signbit l>> Y)) ==/!= 0 into (X << Y) >=/< 0
Expect to fold (X & (signbit << Y)) ==/!= 0 into (X l>> Y) >=/< 0
Reviewers: lebedev.ri, efriedma, spatel, craig.topper
Reviewed By: lebedev.ri
Subscribers: llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63025
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363479 91177308-0d34-0410-b5e6-96231b3b80d8
2019-06-15 00:33:41 +00:00
699aa63fab
AMDGPU: Fold readlane intrinsics of constants
...
I'm not 100% sure about this, since I'm worried about IR transforms
that might end up introducing divergence downstream once replaced with
a constant, but I haven't come up with an example yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363406 91177308-0d34-0410-b5e6-96231b3b80d8
2019-06-14 14:51:26 +00:00
6e4d9e6a89
[AMDGPU] gfx1010 wave32 icmp/fcmp intrinsic changes for wave32
...
Differential Revision: https://reviews.llvm.org/D63301
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363339 91177308-0d34-0410-b5e6-96231b3b80d8
2019-06-13 23:47:36 +00:00
e68f17f5eb
[InstCombine] add test for failed libfunction prototype matching; NFC
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363291 91177308-0d34-0410-b5e6-96231b3b80d8
2019-06-13 18:26:10 +00:00
e2815d1908
[InstCombine] auto-generate complete test checks; NFC
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363286 91177308-0d34-0410-b5e6-96231b3b80d8
2019-06-13 18:14:49 +00:00
ca0b43a08c
[InstCombine] add tests for fmin/fmax libcalls; NFC
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363175 91177308-0d34-0410-b5e6-96231b3b80d8
2019-06-12 15:29:40 +00:00
Roman Lebedev