98595 Commits

Author SHA1 Message Date
Matthew Simpson
caab3a817f [LV] Mark non-consecutive-like pointers non-uniform
If a memory instruction will be vectorized, but it's pointer operand is
non-consecutive-like, the instruction is a gather or scatter operation. Its
pointer operand will be non-uniform. This should fix PR31671.

Reference: https://llvm.org/bugs/show_bug.cgi?id=31671
Differential Revision: https://reviews.llvm.org/D28819

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292254 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-17 20:51:39 +00:00
Dan Gohman
c67238a892 [WebAssembly] Add triple support for the new wasm object format
Differential Revision: https://reviews.llvm.org/D26701


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292252 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-17 20:34:09 +00:00
Sanjoy Das
90b7e38b05 [EarlyCSE] Don't DSE across readnone functions that may throw
Summary: Depends on D28740

Reviewers: dberlin, chandlerc, hfinkel, majnemer

Subscribers: mcrosier, llvm-commits

Differential Revision: https://reviews.llvm.org/D28741

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292249 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-17 20:15:47 +00:00
Ahmed Bougacha
bf5fc97eca [TLI] Appease spurious MSVC warning using llvm_unreachable. NFC.
r292188 confused MSVC because of the combined lack of a default
case and return statement.

Move the unreachable outside of the NumLibFuncs case, to make it
obvious that all cases should be handled.

llvm_unreachable is __declspec(noreturn), so I'm assuming this
does appease MSVC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292246 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-17 19:54:18 +00:00
Joerg Sonnenberger
a7862537ba Remove an overeager assert from r288844.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292244 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-17 19:29:15 +00:00
Bob Wilson
aedf6684c8 Revert r291640 change to fold X86 comparison with atomic_load_add.
Even with the fix from r291630, this still causes problems. I get
widespread assertion failures in the Swift runtime's WeakRefCount::increment()
function. I sent a reduced testcase in reply to the commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292242 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-17 19:18:57 +00:00
Sanjay Patel
3ecd20b357 [ValueTracking] recognize a 'not' of an assumed condition as false
Also, add the corresponding match to the AssumptionCache's 'Affected Values' list.

Differential Revision: https://reviews.llvm.org/D28485



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292239 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-17 18:15:49 +00:00
David Majnemer
64f84982ee [InstCombine] Fold ((C1 OP zext(X)) & C2) -> zext((C1 OP X) & C2)
This further extends r292179 to support additional binary operators
beyond subtraction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292238 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-17 18:08:06 +00:00
Chad Rosier
7eb6751ff6 [ValueTracking] Extend known bits to understand @llvm.bitreverse.
Differential Revision: https://reviews.llvm.org/D28780

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292233 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-17 17:23:51 +00:00
Sanjay Patel
a9edfbaac4 [InstCombine] reduce indent; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292230 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-17 16:59:09 +00:00
George Rimar
ef935cd26f Recommit r292214 "[Support/Compression] - Change zlib API to return Error instead of custom status"
No any changes, will follow up with D28807 commit containing APLi change for clang
to fix build issues happened.

Original commit message:
[Support/Compression] - Change zlib API to return Error instead of custom status.

Previously API returned custom enum values.
Patch changes it to return Error with string description.
That should help users to report errors in universal way.

Differential revision: https://reviews.llvm.org/D28684



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292226 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-17 15:45:07 +00:00
Sam Kolton
9298246497 [AMDGPU] Assembler: fix v_mac_f16 immediates
Reviewers: vpykhtin, artem.tamazov, tstellarAMD

Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, tony-tye

Differential Revision: https://reviews.llvm.org/D28802

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292224 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-17 15:26:02 +00:00
George Rimar
7c0ccdc11d Revert r292214 "[Support/Compression] - Change zlib API to return Error instead of custom status."
It broked clang:
http://lab.llvm.org:8080/green//job/clang-stage1-cmake-RA-incremental_build/34218/consoleFull#46141505449ba4694-19c4-4d7e-bec5-911270d8a58c

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292217 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-17 13:27:58 +00:00
George Rimar
4a6a534c0c [Support/Compression] - Change zlib API to return Error instead of custom status.
Previously API returned custom enum values.
Patch changes it to return Error with string description.
That should help users to report errors in universal way.

Differential revision: https://reviews.llvm.org/D28684

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292214 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-17 13:20:17 +00:00
Serge Rogatch
fca725c192 [XRay][Arm] Repair XRay table emission on Arm32 and add tests to identify such problem earlier
Summary:
Emission of XRay table was occasionally disabled for Arm32, but this bug was not then detected because earlier (also by mistake) testing of XRay was occasionally disabled on 32-bit Arm targets. This patch should fix that problem and detect such problems in the future.
This patch is one of a series, see also
- https://reviews.llvm.org/D28623

Reviewers: rengolin, dberris

Reviewed By: dberris

Subscribers: llvm-commits, aemerson, rengolin, dberris, iid_iunknown

Differential Revision: https://reviews.llvm.org/D28624

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292210 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-17 11:52:10 +00:00
Simon Pilgrim
04f56107c5 [InstCombine][X86][AVX] Add DemandedElts support for VPERMILPD/VPERMILPS instructions
Simplify a vpermilvar shuffle mask based on the elements of the mask that are actually demanded.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292209 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-17 11:35:03 +00:00
Matt Arsenault
62b3258a7c AMDGPU: Add replacement export intrinsics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292205 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-17 07:26:53 +00:00
Alexei Starovoitov
e4bed26281 [bpf] error when unknown bpf helper is called
Emit error when BPF backend sees a call to a global function or to an external symbol.
The kernel verifier only allows calls to predefined helpers from bpf.h
which are defined in 'enum bpf_func_id'. Such calls in assembler must
look like 'call [1-9]+' where number matches bpf_func_id.

Signed-off-by: Alexei Starovoitov <ast@kernel.org>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292204 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-17 07:26:17 +00:00
Craig Topper
1b1ce6ef87 [AVX-512] Add support for taking a bitcast between a SUBV_BROADCAST and VSELECT and moving it to the input of the SUBV_BROADCAST if it will help with using a masked operation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292201 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-17 06:49:59 +00:00
Sanjoy Das
4b48551490 [InstCombine] Don't DSE across readnone functions that may throw
Summary: Depends on D28740

Reviewers: dberlin, chandlerc, hfinkel, majnemer

Subscribers: mcrosier, llvm-commits

Differential Revision: https://reviews.llvm.org/D28742

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292197 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-17 05:45:09 +00:00
Ahmed Bougacha
ce7126af56 Revert "[TLI] Robustize SDAG proto checking by merging it into TLI."
This reverts commit r292189, as it causes issues on SystemZ bots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292191 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-17 03:31:00 +00:00
Ahmed Bougacha
f42a59313b [TLI] Robustize SDAG proto checking by merging it into TLI.
SelectionDAGBuilder recognizes libfuncs using some homegrown
parameter type-checking.

Use TLI instead, removing another heap of redundant code.

This isn't strictly NFC, as the SDAG code was too lax.
Concretely, this means changes are required to two tests:
- calling a non-variadic function via a variadic prototype isn't OK;
  it just happens to work on x86_64 (but not on, e.g., aarch64).
- mempcpy has a size_t parameter;  the SDAG code accepts any integer
  type, which meant using i32 on x86_64 worked.

I don't think it's worth supporting either of these (IMO) broken
testcases.  Instead, fix them to be more correct.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292189 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-17 03:10:06 +00:00
Ahmed Bougacha
be550d0c30 [TLI] Add prototype checking for all remaining LibFuncs.
This is another step towards unifying all LibFunc prototype checks.
This work started in r267758 (D19469);  add the remaining checks.

Also add a unittest that checks each libfunc declared with a known-valid
and known-invalid prototype.  New libfuncs added in the future are
required to have prototype checking in place; the known-valid test will
fail otherwise.

Differential Revision: https://reviews.llvm.org/D28030

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292188 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-17 03:10:02 +00:00
Ahmed Bougacha
70b9507f8a [TLI] Alphabetize some of the prototype check switch. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292187 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-17 03:10:00 +00:00
Alexei Starovoitov
de21301ed7 [bpf] error when BPF stack size exceeds 512 bytes
Signed-off-by: Alexei Starovoitov <ast@kernel.org>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292180 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-17 01:05:17 +00:00
David Majnemer
4b66daa8cc [InstCombine] Fold ((C1-zext(X)) & C2) -> zext((C1-X) & C2)
This is valid if C2 fits within the bitwidth of X thanks to two's
complement modulo arithmetic.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292179 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-17 00:45:57 +00:00
Matt Arsenault
3bd79e8a80 SimplifyLibCalls: Remove checks for fabs
Use the intrinsic instead of emitting the libcall which
will be replaced by the intrinsic.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292176 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-17 00:30:31 +00:00
Matt Arsenault
d4ac29ff29 AMDGPU: Remove dead pattern
This is the unsafe conversion pattern, but not guarded by
an unsafe math check. It is also already done in LegalizeDAG.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292173 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-17 00:10:43 +00:00
Matt Arsenault
5276f9a934 SimplifyLibCalls: Replace fabs libcalls with intrinsics
Add missing fabs(fpext) optimzation that worked with the call,
and also fixes it creating a second fpext when there were multiple
uses.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292172 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-17 00:10:40 +00:00
Sanjay Patel
4ee9281ee4 [InstCombine] use m_APInt instead of faking it
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292164 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-16 21:24:41 +00:00
Jan Vesely
6d821c2f7c ADMGPU/EG,CM: Implement _noret global atomics
_RTN versions will be a lot more complicated

Differential Revision: https://reviews.llvm.org/D28067

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292162 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-16 21:20:13 +00:00
Tony Jiang
758e067345 [PowerPC] Expand ISEL instruction into if-then-else sequence.
Generally, the ISEL is expanded into if-then-else sequence, in some
cases (like when the destination register is the same with the true
or false value register), it may just be expanded into just the if
or else sequence.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292154 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-16 20:12:26 +00:00
Sanjay Patel
627c8074e7 [InstCombine] fix names in canEvaluateShiftedShift(); NFC
It's not clear what 'First' and 'Second' mean, so use 'Inner' and 'Outer'
to match foldShiftedShift() and add comments with formulas, so it's easier
to see what's going on.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292153 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-16 20:05:26 +00:00
Sanjay Patel
2222ec4bc9 [InstCombine] use m_APInt to allow shift-shift folds for vectors with splat constants
Some existing 'FIXME' tests are still not folded because of splat holes in value tracking.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292151 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-16 19:35:45 +00:00
Sanjay Patel
0f258723e9 [InstCombine] refactor shift-of-shift folds; NFCI
Reduces code duplication and makes it easier to extend these folds for vectors.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292145 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-16 17:27:50 +00:00
Chad Rosier
a7959e565a [AArch64] Falkor supports Rounding Double Multiply Add/Subtract instructions.
Falkor only partially implements the ARMv8.1a extensions, so this patch
refactors the support for the SQRDML[A|S]H instruction into a separate
feature.

Differential Revision: https://reviews.llvm.org/D28681

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292142 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-16 16:28:43 +00:00
Daniel Sanders
064b91fd98 Revert r292132: [globalisel] Tablegen-erate current Register Bank Information'...
Several buildbots encountered a crash in tablegen when building this commit.
Reverting while I investigate the cause.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292136 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-16 15:34:43 +00:00
Hal Finkel
b1c51125dd Fix use-after-free bug in AffectedValueCallbackVH::allUsesReplacedWith
When transferring affected values in the cache from an old value, identified by
the value of the current callback, to the specified new value we might need to
insert a new entry into the DenseMap which constitutes the cache. Doing so
might delete the current callback object. Move the copying logic into a new
function, a member of the assumption cache itself, so that we don't run into UB
should the callback handle itself be removed mid-copy.

Differential Revision: https://reviews.llvm.org/D28749

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292133 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-16 15:22:01 +00:00
Daniel Sanders
ca24065b98 [globalisel] Tablegen-erate current Register Bank Information
Summary:
Adds a RegisterBank tablegen class that can be used to declare the register
banks and an associated tablegen pass to generate the necessary code.

Reviewers: t.p.northover, ab, rovka, qcolombet

Subscribers: aditya_nandakumar, rengolin, kristof.beyls, vkalintiris, mgorny, dberris, llvm-commits, rovka

Differential Revision: https://reviews.llvm.org/D27338

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292132 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-16 15:20:43 +00:00
Tony Jiang
748e859f36 Revert "[PowerPC] Expand ISEL instruction into if-then-else sequence."
This reverts commit 1d0e0374438ca6e153844c683826ba9b82486bb1.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292131 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-16 15:01:07 +00:00
Simon Pilgrim
1f7c0c9364 [SelectionDAG] Add knownbits support for BITREVERSE
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292130 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-16 14:49:26 +00:00
Tony Jiang
541103a1c6 [PowerPC] Expand ISEL instruction into if-then-else sequence.
Generally, the ISEL is expanded into if-then-else sequence, in some
cases (like when the destination register is the same with the true
or false value register), it may just be expanded into just the if
or else sequence.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292128 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-16 14:43:12 +00:00
Simon Dardis
dcca2bf437 [mips] Correct c.cond.fmt instruction definition.
Permit explicit $fcc<X> operand in c.cond.fmt instruction.

Add c.cond.fmt to the MIPS to microMIPS instruction mapping table.

Check that $fcc1 - $fcc7 are unusable for MIPS-I to MIPS-III for
c.cond.fmt, bc1t, bc1f.

Reviewers: seanbruno, zoran.jovanovic, vkalintiris

Differential Revision: https://reviews.llvm.org/D24510



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292117 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-16 13:55:58 +00:00
Simon Pilgrim
b648fac5ca [SelectionDAG] Add support for BITREVERSE constant folding
We were relying on constant folding of the legalized instructions to do what constant folding we had previously

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292114 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-16 13:39:00 +00:00
Simon Pilgrim
07d3c0f01c [InstCombine][SSE] Add DemandedElts support for PSHUFB instructions
Simplify a pshufb shuffle mask based on the elements of the mask that are actually demanded.

Differential Revision: https://reviews.llvm.org/D28745

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292101 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-16 11:30:41 +00:00
Craig Topper
f031545412 [X86] Merge the disassemblers handling of the different TYPE_RELs by getting the size information from the ENCODING field. NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292096 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-16 06:49:09 +00:00
Craig Topper
14d16cc514 [X86] Reduce the number of operand 'types' the disassembler needs to deal with. NFCI
We were frequently checking for a list of types and the different types
conveyed no real information. So lump them together explicitly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292095 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-16 06:49:03 +00:00
Craig Topper
d925138fc6 [AVX-512] Teach the disassembler about all of the EVEX gather and scatter instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292094 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-16 05:44:33 +00:00
Craig Topper
75deb64c6f [AVX-512] Begin giving the disassembler a way to recognize that VSIB is a different encoding than regular addressing modes.
This part first teaches it not to check error if EVEX.V2 is used by a VSIB instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292093 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-16 05:44:25 +00:00
Craig Topper
00915333a9 [AVX-512] Correct memory operand size for VPGATHERQPS and VPGATHERQD
with ZMM index. Similar for SCATTER and the prefetch gather and scatter
instructions.

Fixes PR31618.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292088 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-16 00:55:58 +00:00