Eric Christopher
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cb0b04ba6f
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Add some more debugging code, make it more obvious that RegOffset is
getting an address for an object and select some default values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111871 91177308-0d34-0410-b5e6-96231b3b80d8
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2010-08-24 00:07:24 +00:00 |
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Eric Christopher
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1dfb4d31e0
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Don't need the extra register here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111864 91177308-0d34-0410-b5e6-96231b3b80d8
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2010-08-23 23:28:04 +00:00 |
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Eric Christopher
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8654c71e56
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Add some more "get address into register" code and a more TODOs/FIXMEs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111860 91177308-0d34-0410-b5e6-96231b3b80d8
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2010-08-23 23:14:31 +00:00 |
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Eric Christopher
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7fe55b739c
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Add an ARMFunctionInfo member and use it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111854 91177308-0d34-0410-b5e6-96231b3b80d8
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2010-08-23 22:32:45 +00:00 |
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Eric Christopher
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8300712c1e
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Start getting ARM loads/address computation going.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111850 91177308-0d34-0410-b5e6-96231b3b80d8
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2010-08-23 21:44:12 +00:00 |
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Eric Christopher
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f762fbe4fa
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Fix loop conditionals (MO.isDef() asserts that it's a reg) and
move some constraints around.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111594 91177308-0d34-0410-b5e6-96231b3b80d8
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2010-08-20 00:36:24 +00:00 |
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Eric Christopher
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cb59229a4a
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Add a couple of random comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111592 91177308-0d34-0410-b5e6-96231b3b80d8
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2010-08-20 00:20:31 +00:00 |
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Eric Christopher
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979e0a1414
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Silence warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111518 91177308-0d34-0410-b5e6-96231b3b80d8
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2010-08-19 15:35:27 +00:00 |
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Eric Christopher
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456144eb14
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Add an AddOptionalDefs method and use it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111489 91177308-0d34-0410-b5e6-96231b3b80d8
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2010-08-19 00:37:05 +00:00 |
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Eric Christopher
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0fe7d54732
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Copy over some overridden MI wrappers for ARM fast-isel. This is where
we're adding predicates and optional defs to the MachineInstrs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111222 91177308-0d34-0410-b5e6-96231b3b80d8
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2010-08-17 01:25:29 +00:00 |
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Eric Christopher
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038fea5e30
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Make arm fast-isel possible to enable via command line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111219 91177308-0d34-0410-b5e6-96231b3b80d8
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2010-08-17 00:46:57 +00:00 |
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Evan Cheng
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0944795b8c
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ARM fastisel isn't ready.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109421 91177308-0d34-0410-b5e6-96231b3b80d8
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2010-07-26 18:32:55 +00:00 |
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Eric Christopher
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ab695889c6
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Baby steps towards ARM fast-isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109047 91177308-0d34-0410-b5e6-96231b3b80d8
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2010-07-21 22:26:11 +00:00 |
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