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f3372d1d64
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2604 Commits

Author SHA1 Message Date
Dan Gohman
f3372d1d64 Fix pastos in vector arithmetic intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40754 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-02 21:06:40 +00:00
Dan Gohman
73a902b228 Mark the SSE and MMX load instructions that 
X86InstrInfo::isReallyTriviallyReMaterializable knows how to handle
with the isReMaterializable flag so that it is given a chance to handle
them. Without hoisting constant-pool loads from loops this isn't very
visible, though it does keep CodeGen/X86/constant-pool-remat-0.ll from
making a copy of the constant pool on the stack.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40736 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-02 14:27:55 +00:00
Evan Cheng
7afa166c76 Switch some multiplication instructions over to the new scheme for testing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40723 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-02 05:48:35 +00:00
Evan Cheng
5278784621 Can't handle offset and scale if rip-relative addressing is to be used. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40703 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-01 23:46:47 +00:00
Evan Cheng
0db079e2e6 Mac OS X X86-64 low 4G address not available. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40702 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-01 23:46:10 +00:00
Evan Cheng
f6844ca0e4 Mac OS X X86-64 low 4G address not available. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40701 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-01 23:45:51 +00:00
Evan Cheng
c5dd54154a Missing Requires. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40691 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-01 21:42:24 +00:00
Evan Cheng
1c3017c51e Be more precise. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40689 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-01 20:22:37 +00:00
Dan Gohman
a9f643432d Change a .size directive to use a tab instead of a space, for consistency. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40672 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-01 14:42:30 +00:00
Dan Gohman
b1576f56c8 Change the x86 assembly output to use tab characters to separate the 
mnemonics from their operands instead of single spaces. This makes the
assembly output a little more consistent with various other compilers
(f.e. GCC), and slightly easier to read. Also, update the regression
tests accordingly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40648 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-31 20:11:57 +00:00
Evan Cheng
c64a1a921c Redo and generalize previously removed opt for pinsrw: (vextract (v4i32 bc (v4f32 s2v (f32 load ))), 0) -> (i32 load ) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40628 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-31 08:04:03 +00:00
Evan Cheng
4ebcc8c2f8 This isn't safe when there are uses of load's chain result. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40617 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-31 06:21:44 +00:00
Dan Gohman
825811dc83 Use tabs more consistently in assembler pseudo-ops. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40594 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-30 15:08:02 +00:00
Christopher Lamb
2dc6dc619c Change the x86 backend to use extract_subreg for truncation operations. Passes DejaGnu, SingleSource and MultiSource. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40578 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-29 01:24:57 +00:00
Christopher Lamb
f9b90ea955 Add register info needed to use subreg sets on X86. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40572 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-28 19:03:30 +00:00
Duncan Sands
b116fac90f Trampoline codegen support for X86-32. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40566 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-27 20:02:49 +00:00
Dan Gohman
d300622eba Re-apply 40504, but with a fix for the segfault it caused in oggenc: 
Make the alignedload and alignedstore patterns always require 16-byte
alignment. This way when they are used in the "Fs" instructions, in which
a vector instruction is used for a scalar purpose, they can still require
the full vector alignment. And add a regression test for this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40555 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-27 17:16:43 +00:00
Evan Cheng
3e22947d9a Reverting 40504 for now. It's breaking oggenc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40547 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-27 01:37:47 +00:00
Evan Cheng
fcc8793dc8 Make sure epilogue esp adjustment is placed before any terminator and pop instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40538 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-26 17:45:41 +00:00
Evan Cheng
85dce6cf78 Don't pollute the meaning of isUnpredicatedTerminator. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40537 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-26 17:32:14 +00:00
Evan Cheng
cf5543c47e Minor bug. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40535 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-26 17:02:45 +00:00
Dan Gohman
b6bbe39ff9 In the .loc directive, print the fields as "debug" fields, so they 
don't get decorated as if for immediate fields for instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40529 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-26 15:24:15 +00:00
Dan Gohman
1704c2f9b9 Fix a whitespace difference between CMPSSrr and CMPSDrr. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40528 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-26 15:11:50 +00:00
Evan Cheng
518143d795 Same goes for constantpool, etc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40517 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-26 07:35:15 +00:00
Dan Gohman
d3283832aa Remove X86ISD::LOAD_PACK and X86ISD::LOAD_UA and associated code from the 
x86 target, replacing them with the new alignment attributes on memory
references.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40504 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-26 00:31:09 +00:00
Evan Cheng
a49ed78c27 Mac OS X x86-64 lower 4G address is not available. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40502 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-25 23:41:36 +00:00
Evan Cheng
ad5e9cac02 Mac OS X should use 0x90 to fill in gaps to satisfy function alignment requirements. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40501 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-25 23:36:05 +00:00
Evan Cheng
d88ea4d9aa Functions with LinkOnce and weak linkage still need to be aligned. Doh. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40499 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-25 22:28:16 +00:00
Dan Gohman
b8275a3f6f Don't ignore the return value of AsmPrinter::doInitialization and 
AsmPrinter::doFinalization.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40487 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-25 19:33:14 +00:00
Anton Korobeynikov
59db3ec935 Minor cleanup: 
- Split EH and debug infiormation
 - Make DwarfWriter more verbose in some cases


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40481 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-25 00:06:28 +00:00
Dan Gohman
dc9b3d0bb5 Add const to CanBeFoldedBy, CheckAndMask, and CheckOrMask. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40480 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-24 23:00:27 +00:00
Dan Gohman
a394117bc0 Use movaps to load a v4f32 build_vector of all-constant values into a 
register instead of loading each element individually.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40478 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-24 22:55:08 +00:00
Anton Korobeynikov
d97b8cd38c Heal EH handling stuff by emitting correct offsets to callee-saved registers. 
Pretty hackish, but code itself is dirty mess, so we won't make anything worse. :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40472 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-24 21:07:39 +00:00
Dan Gohman
275769a77a Fix some uses of dyn_cast to be uses of cast. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40443 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-23 20:24:29 +00:00
Dan Gohman
63491b2e15 Delete the svn:executable property on these files, which aren't executable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40441 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-23 19:26:08 +00:00
Bill Wendling
6a20cf0776 Add missing SSE builtins: 
__builtin_ia32_cvtss2si64
    __builtin_ia32_cvttss2si64
    __builtin_ia32_cvtsi642ss
    __builtin_ia32_cvtsd2si64
    __builtin_ia32_cvttsd2si64
    __builtin_ia32_cvtsi642sd


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40411 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-23 03:07:27 +00:00
Evan Cheng
ffbaccae02 No more noResults. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40132 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-21 00:34:19 +00:00
Evan Cheng
8bd6035750 Added -print-emitted-asm to print out JIT generated asm to cerr. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40123 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-20 21:56:13 +00:00
Evan Cheng
b4162fd393 Because we promote SSE logical ops and loads to v2i64, we often end up generate 
code that cross integer / floating point domains (e.g. generate pxor / pand for
logical ops on floating point value, movdqa to load / store floating point SSE
values). Given that, it's better to use movaps instead of movdqa and movups
instead of movdqu. They have the same latency but the "aps" variants are one
byte shorter.
If the domain crossing problem is a real performance issue, then we will have to
fix it with dynamic programming based isel.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40076 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-20 00:27:43 +00:00
Evan Cheng
d4d01b71a7 Fix custom lowering of SSE FXOR. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40071 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-19 23:36:01 +00:00
Evan Cheng
31d3a65052 Fix patterns so we isel the xorps, etc. for floating pt logical SSE ops. DAG combiner may fold away the (bit_convert (load)). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40070 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-19 23:34:10 +00:00
Evan Cheng
64d80e3387 Change instruction description to split OperandList into OutOperandList and 
InOperandList. This gives one piece of important information: # of results
produced by an instruction.
An example of the change:
def ADD32rr  : I<0x01, MRMDestReg, (ops GR32:$dst, GR32:$src1, GR32:$src2),
                 "add{l} {$src2, $dst|$dst, $src2}",
                 [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;
=>
def ADD32rr  : I<0x01, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2),
                 "add{l} {$src2, $dst|$dst, $src2}",
                 [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40033 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-19 01:14:50 +00:00
Evan Cheng
7e7bbf8271 Only adjust esp around calls in presence of alloca. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40028 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-19 00:42:05 +00:00
Evan Cheng
3c46eefba2 Use MOV instead of LEA to restore ESP if callee-saved frame size is 0; if previous instruction updates esp, fold it in. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40018 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-18 21:26:06 +00:00
Dan Gohman
4106f3714e Implement initial memory alignment awareness for SSE instructions. Vector loads 
and stores that have a specified alignment of less than 16 bytes now use
instructions that support misaligned memory references.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40015 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-18 20:23:34 +00:00
Evan Cheng
b5cd24973c New entry. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39998 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-18 08:21:49 +00:00
Evan Cheng
9b8c674432 Fold prologue esp update when possible. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39984 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-17 21:26:42 +00:00
Evan Cheng
5b3332cc27 Make sure not to break eh_return. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39978 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-17 18:40:47 +00:00
Evan Cheng
698b63862c Update. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39977 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-17 18:39:45 +00:00
Evan Cheng
f27795d174 Missed the case where alloca is used but the stack size (not including callee-saved portion) is zero. Thanks Dan. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39974 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-17 18:03:34 +00:00