I also added a rule to the ARM target's Makefile to
build the ARM-specific instruction information table
for the enhanced disassembler.
I will add the test harness for all this stuff in
a separate commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100735 91177308-0d34-0410-b5e6-96231b3b80d8
disassembly library that provide access to
instruction information, and fixed ambiguous
wording in the comments for the header.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95274 91177308-0d34-0410-b5e6-96231b3b80d8