Commit Graph

10687 Commits

Author SHA1 Message Date
Sanjay Patel 0fd98222ce [InstCombine] add memcpy expansion tests with potential DL dependency; NFC
Current behavior is to transform these independently of the datalayout.

There's a proposal to change this in D35035:
https://reviews.llvm.org/D35035


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310611 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-10 15:37:26 +00:00
Sanjay Patel 32221c778c [InstCombine] regenerate test checks; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310603 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-10 15:07:37 +00:00
Sanjay Patel f0f6731796 [InstCombine] regenerate test checks, add comments; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310598 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-10 14:51:42 +00:00
Chad Rosier 0db3a4f041 [NewGVN] Add CL option to control the generation of phi-of-ops (disable by default).
Differential Revision: https://reviews.llvm.org/D36478539

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310594 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-10 14:12:57 +00:00
Craig Topper 3c1a9a0485 [InstSimplify] Add test cases that show that simplifySelectWithICmpCond doesn't work with non-canonical comparisons.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310542 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-10 01:02:02 +00:00
Sanjay Patel c85760a9a3 [SimplifyCFG] remove checks for crasher test from r310481
Not sure why the earlier version would fail, but trying to get the bots
(and my local machine) to pass again.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310510 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-09 18:56:26 +00:00
Sanjay Patel 3cc2bfae49 [InstCombine] narrow rotate left/right patterns to eliminate zext/trunc (PR34046)
I couldn't find any smaller folds to help the cases in:
https://bugs.llvm.org/show_bug.cgi?id=34046
after:
rL310141

The truncated rotate-by-variable patterns elude all of the existing transforms because 
of multiple uses and knowledge about demanded bits and knownbits that doesn't exist 
without the whole pattern. So we need an unfortunately large pattern match. But by 
simplifying this pattern in IR, the backend is already able to generate 
rolb/rolw/rorb/rorw for x86 using its existing rotate matching logic (although
there is a likely extraneous 'and' of the rotate amount). 

Note that rotate-by-constant doesn't have this problem - smaller folds should already 
produce the narrow IR ops.

Differential Revision: https://reviews.llvm.org/D36395



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310509 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-09 18:37:41 +00:00
Davide Italiano a07262ded4 [ValueTracking] Update tests to unbreak the bots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310492 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-09 16:06:04 +00:00
Davide Italiano 7805791efa [ValueTracking] Honour recursion limit.
The recently improved support for `icmp` in ValueTracking
(r307304) exposes the fact that `isImplied` condition doesn't
really bail out if we hit the recursion limit (and calls
`computeKnownBits` which increases the depth and asserts).

Differential Revision:  https://reviews.llvm.org/D36512

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310481 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-09 15:13:50 +00:00
Craig Topper 94b1780d8a [InstCombine] Add a test case for a missed opportunity to turn a select into logic ops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310434 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-09 01:30:22 +00:00
Wei Mi a39bc3c640 [GVN] Remove stale entries in phitranslate cache when new phi is generated for PRE
When a new phi is generated for scalarpre of an expression, the phiTranslate cache
will become stale: Before PRE, the candidate expression must not be available in a
predecessor block, and phitranslate will cache the information. After PRE, the
expression will become available in all predecessor blocks, so the related entries
in phiTranslate cache becomes stale. The patch will simply remove the stale entries
so phiTranslate can be recomputed next time.

The stale entries in phitranslate cache will not affect correctness but will cause
missing PRE opportunity for later instructions.

Differential Revision: https://reviews.llvm.org/D36124


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310421 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-08 21:40:14 +00:00
Dehao Chen 8a7a8e6735 Make ICP uses PSI to check for hotness.
Summary: Currently, ICP checks the count against a fixed value to see if it is hot enough to be promoted. This does not work for SamplePGO because sampled count may be much smaller. This patch uses PSI to check if the count is hot enough to be promoted.

Reviewers: davidxl, tejohnson, eraman

Reviewed By: davidxl

Subscribers: sanjoy, llvm-commits, mehdi_amini

Differential Revision: https://reviews.llvm.org/D36341

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310416 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-08 20:57:33 +00:00
Craig Topper 2fe6bd41fe [InstCombine] Support pulling left shifts through a subtract with constant LHS
We already support pulling through an add with constant RHS. We can do the same for subtract.

Differential Revision: https://reviews.llvm.org/D36443

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310407 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-08 20:14:11 +00:00
Anna Thomas 0428548839 [LoopVectorize] Fix assertion failure in Fcmp vectorization
Summary:
When vectorizing fcmps we can trip on incorrect cast assertion when setting the
FastMathFlags after generating the vectorized FCmp.
This can happen if the FCmp can be folded to true or false directly. The fix
here is to set the FastMathFlag using the FastMathFlagBuilder *before* creating
the FCmp Instruction. This is what's done by other optimizations such as
InstCombine.
Added a test case which trips on cast assertion without this patch.

Reviewers: Ayal, mssimpso, mkuper, gilr

Reviewed by: Ayal, mssimpso

Subscribers: llvm-commits, mzolotukhin

Differential Revision: https://reviews.llvm.org/D36244

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310389 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-08 18:07:44 +00:00
Chandler Carruth 6b0837c5da [PM] Relax the spelling of a pass name slightly in this test.
I forgot that MSVC doesn't preserve this typedef, my bad.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310334 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-08 02:27:49 +00:00
Chandler Carruth f4c6127fb8 [PM] Fix new LoopUnroll function pass by invalidating loop analysis
results when a loop is completely removed.

This is very hard to manifest as a visible bug. You need to arrange for
there to be a subsequent allocation of a 'Loop' object which gets the
exact same address as the one which the unroll deleted, and you need the
LoopAccessAnalysis results to be significant in the way that they're
stale. And you need a million other things to align.

But when it does, you get a deeply mysterious crash due to actually
finding a stale analysis result. This fixes the issue and tests for it
by directly checking we successfully invalidate things. I have not been
able to get *any* test case to reliably trigger this. Changes to LLVM
itself caused the only test case I ever had to cease to crash.

I've looked pretty extensively at less brittle ways of fixing this and
they are actually very, very hard to do. This is a somewhat strange and
unusual case as we have a pass which is deleting an IR unit, but is not
running within that IR unit's pass framework (which is what handles this
cleanly for the normal loop unroll). And where there isn't a definitive
way to clear *all* of the stale cache entries. And where the pass *is*
updating the core analysis that provides the IR units!

For example, we don't have any of these problems with Function analyses
because it is easy to clear out function analyses when the functions
themselves may have been deleted -- we clear an entire module's worth!
But that is too heavy of a hammer down here in the LoopAnalysisManager
layer.

A better long-term solution IMO is to require that AnalysisManager's
make their keys durable to this kind of thing. Specifically, when
caching an analysis for one IR unit that is conceptually "owned" by
a higher level IR unit, the AnalysisManager should incorporate this into
its data structures so that we can reliably clear these results without
having to teach each and every pass to do so manually as we do here. But
that is a change for another day as it will be a fairly invasive change
to the AnalysisManager infrastructure. Until then, this fortunately
seems to be quite rare.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310333 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-08 02:24:20 +00:00
Evgeny Stupachenko b6ff06ef35 Reapply fix PR23384 (part 3 of 3) r304824 (was reverted in r305720).
The root cause of reverting was fixed - PR33514.

Summary:
The patch makes instruction count the highest priority for
 LSR solution for X86 (previously registers had highest priority).

Reviewers: qcolombet

Differential Revision: http://reviews.llvm.org/D30562

From: Evgeny Stupachenko <evstupac@gmail.com>
                         <evgeny.v.stupachenko@intel.com>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310289 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-07 19:56:34 +00:00
Matt Arsenault e525b474ef AMDGPU: Remove -mcpu=SI
Leftover from before amdgcn/r600 split.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310277 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-07 18:30:35 +00:00
Craig Topper 4dc104b36b [InstCombine] Support (X | C1) & C2 --> (X & C2^(C1&C2)) | (C1&C2) for vector splats
Note the original code I deleted incorrectly listed this as (X | C1) & C2 --> (X & C2^(C1&C2)) | C1 Which is only valid if C1 is a subset of C2. This relied on SimplifyDemandedBits to remove any extra bits from C1 before we got to that code.

My new implementation avoids relying on that behavior so that it can be naively verified with alive.

Differential Revision: https://reviews.llvm.org/D36384

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310272 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-07 18:10:39 +00:00
Matt Arsenault a4262847c8 AMDGPU: Use a custom areInlineCompatible
Fixes not inlining OpenCL library functions on AMDGPU,
which don't have an explicitly set target-cpu.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310269 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-07 17:08:44 +00:00
Alexey Bataev a64c8c9af1 [SLP] General improvements of SLP vectorization process.
Patch tries to improve two-pass vectorization analysis, existing in SLP vectorizer. What it does:

1. Defines key nodes, that are the vectorization roots. Previously vectorization started if StoreInst or ReturnInst is found. For now, the vectorization started for all Instructions with no users and void types (Terminators, StoreInst) + CallInsts.
2. CmpInsts, InsertElementInsts and InsertValueInsts are stored in the
array. This array is processed only after the vectorization of the
first-after-these instructions key node is finished. Vectorization goes
in reverse order to try to vectorize as much code as possible.

Reviewers: mzolotukhin, Ayal, mkuper, gilr, hfinkel, RKSimon

Subscribers: ashahid, anemet, RKSimon, mssimpso, llvm-commits

Differential Revision: https://reviews.llvm.org/D29826

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310260 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-07 15:25:49 +00:00
Alexey Bataev 20e83eb193 Revert "[SLP] General improvements of SLP vectorization process."
This reverts commit r310255.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310257 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-07 14:51:52 +00:00
Alexey Bataev 4362efa895 [SLP] General improvements of SLP vectorization process.
Summary:
Patch tries to improve two-pass vectorization analysis, existing in SLP vectorizer. What it does:
1. Defines key nodes, that are the vectorization roots. Previously vectorization started if StoreInst or ReturnInst is found. For now, the vectorization started for all Instructions with no users and void types (Terminators, StoreInst) + CallInsts.
2. CmpInsts, InsertElementInsts and InsertValueInsts are stored in the array. This array is processed only after the vectorization of the first-after-these instructions key node is finished. Vectorization goes in reverse order to try to vectorize as much code as possible.

Reviewers: mzolotukhin, Ayal, mkuper, gilr, hfinkel, RKSimon

Subscribers: ashahid, anemet, RKSimon, mssimpso, llvm-commits

Differential Revision: https://reviews.llvm.org/D29826

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310255 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-07 14:03:17 +00:00
Michael Zuckerman f87ba7b701 [X86][LLVM]Expanding Supports lowerInterleavedStore() in X86InterleavedAccess (VF16 stride 4).
This patch expands the support of lowerInterleavedStore to 16x8i stride 4.

LLVM creates suboptimal shuffle code-gen for AVX2. In overall, this patch is a specific fix for the pattern (Strid=4 VF=16) and we plan to include more patterns in the future.

The patch goal is to optimize the following sequence:
At the end of the computation, we have ymm2, ymm0, ymm12 and ymm3 holding
each 16 chars:

c0, c1, , c16
m0, m1, , m16
y0, y1, , y16
k0, k1, ., k16

And these need to be transposed/interleaved and stored like so:

c0 m0 y0 k0 c1 m1 y1 k1 c2 m2 y2 k2 c3 m3 y3 k3 ....

Differential Revision: https://reviews.llvm.org/D35829


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310252 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-07 13:22:39 +00:00
Craig Topper dc2e525e03 [InstCombine] Support (X ^ C1) & C2 --> (X & C2) ^ (C1&C2) for vector splats.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310233 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-06 23:11:49 +00:00
Craig Topper 6b4cc4f3b5 [InstCombine] Support '(C - X) ^ signmask -> (C + signmask - X)' and '(X + C) ^ signmask -> (X + C + signmask)' for vector splats.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310232 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-06 22:17:21 +00:00
Simon Pilgrim 4bd72a825d [SLPVectorizer][X86] Cleanup test case. NFCI
Remove excess attributes/metadata

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310227 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-06 20:50:19 +00:00
Craig Topper 946e6ed8ac [InstCombine] Support ~(c-X) --> X+(-c-1) and ~(X-c) --> (-c-1)-X for splat vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310195 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-06 06:28:41 +00:00
Craig Topper 96fa22223c [InstCombine] Regenerate test28_sub test case in xor.ll that I forgot to commit after fixing a typo in r310186.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310188 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-05 22:44:38 +00:00
Craig Topper e9e9a558ff [InstCombine] Fold (C - X) ^ signmask -> (C + signmask - X).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310186 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-05 20:00:44 +00:00
Craig Topper c5136a3282 [InstCombine] Teach the code that pulls logical operators through constant shifts to handle vector splats too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310185 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-05 20:00:42 +00:00
Craig Topper 6eef5df328 [InstCombine] Support vector splats in foldSelectICmpAnd.
Unfortunately, it looks like there's some other missed optimizations in the generated code for some of these cases. I'll try to look at some of those next.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310184 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-05 20:00:41 +00:00
Dinar Temirbulatov f24c4662b3 [SLPVectorizer] Add extra parameter to setInsertPointAfterBundle to handle different opcodes, NFCI.
Differential Revision: https://reviews.llvm.org/D35769


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310183 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-05 18:43:52 +00:00
Craig Topper a64054eb61 [InstCombine] In foldSelectICmpAnd, if we need to to truncate from the 'and' type to the 'select' type, do it after shifting right instead of just bailing.
Previously we were always trying to emit the zext or truncate before any shift. This meant if the 'and' mask was larger than the size of the truncate we would skip the transformation.

Now we shift the result of the and right first leaving the bit within the range of the truncate.

This matches what we are doing in foldSelectICmpAndOr for the same problem.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310159 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-05 01:45:17 +00:00
Sanjay Patel 09cd716275 [InstCombine] narrow truncated add/sub/mul with constant
Name: narrow_sub
  %sub = sub i32 C1, %x
  %r = trunc i32 %sub to i8
  =>  
  %xn = trunc i32 %x to i8
  %narrowC = trunc i32 C1 to i8
  %r = sub i8 %narrowC, %xn
 
Name: narrow_add
  %add = add i32 %x, C1
  %r = trunc i32 %add to i8
  =>  
  %xn = trunc i32 %x to i8
  %narrowC = trunc i32 C1 to i8
  %r = add i8 %xn, %narrowC
  
Name: narrow_mul
  %mul = mul i32 %x, C1
  %r = trunc i32 %mul to i8
  =>  
  %xn = trunc i32 %x to i8
  %narrowC = trunc i32 C1 to i8
  %r = mul i8 %xn, %narrowC


http://rise4fun.com/Alive/QpS

This doesn't solve PR34046 (failure to recognize rotate):
https://bugs.llvm.org/show_bug.cgi?id=34046
...but it reduces an extra complication in the description examples 
to a form that we can more easily match.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310141 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-04 22:30:34 +00:00
Nico Weber 4aabf12607 Revert r310055, it caused PR34074.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310123 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-04 20:40:38 +00:00
Sanjay Patel 310c521bc4 [InstCombine] add vector tests for truncated math; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310122 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-04 20:38:33 +00:00
Amara Emerson edab1e126c [SCEV] Preserve NSW information for sext(subtract).
Pushes the sext onto the operands of a Sub if NSW is present.
Also adds support for propagating the nowrap flags of the
llvm.ssub.with.overflow intrinsic during analysis.

Differential Revision: https://reviews.llvm.org/D35256

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310117 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-04 20:19:46 +00:00
Sanjay Patel 1b307569a6 [InstCombine] auto-generate test checks; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310101 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-04 19:29:32 +00:00
Evgeny Stupachenko cb6d1820b8 Fix PR33514
Summary:
The bug was uncovered after fix of  PR23384 (part 3 of 3).
The patch restricts pointer multiplication in SCEV computaion for ICmpZero.

Reviewers: qcolombet

Differential Revision: http://reviews.llvm.org/D36170

From: Evgeny Stupachenko <evstupac@gmail.com>
                         <evgeny.v.stupachenko@intel.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310092 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-04 18:46:13 +00:00
Reid Kleckner c7429cbd06 [ArgPromotion] Preserve alignment of byval argument in new alloca
The frontend may have requested a higher alignment for any reason, and
downstream optimizations may already have taken advantage of it.  We
should keep the same alignment when moving the allocation from the
parameter area to the local variable area.

Fixes PR34038

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310071 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-04 17:09:11 +00:00
Craig Topper 582a2bb8af [InstCombine] Remove the (not (sext)) case from foldBoolSextMaskToSelect and inline the remaining code to match visitOr
Summary:
The (not (sext)) case is really (xor (sext), -1) which should have been simplified to (sext (xor, 1)) before we got here. So we shouldn't need to handle it.

With that taken care of we only need to two cases so don't need the swap anymore. This makes us in sync with the equivalent code in visitOr so inline this to match.

Reviewers: spatel, eli.friedman, majnemer

Reviewed By: spatel

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D36240

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310063 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-04 16:07:20 +00:00
Sanjay Patel 4e29225d15 [InstCombine] narrow lshr with constant
Name: narrow_shift
Pre: C1 < 8
%zx = zext i8 %x to i32
%l = lshr i32 %zx, C1
  =>  
%narrowC = trunc i32 C1 to i8
%ns = lshr i8 %x, %narrowC
%l = zext i8 %ns to i32

http://rise4fun.com/Alive/jIV

This isn't directly applicable to PR34046 as written, but we
need to have more narrowing folds like this to be sure that
rotate patterns are recognized.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310060 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-04 15:42:47 +00:00
Filipe Cabecinhas f27bcb0a8e [DSE] Merge stores when the later store only writes to memory locations the early store also wrote to.
Summary:
This fixes PR31777.

If both stores' values are ConstantInt, we merge the two stores
(shifting the smaller store appropriately) and replace the earlier (and
larger) store with an updated constant.

In the future we should also support vectors of integers. And maybe
float/double if we can.

Reviewers: hfinkel, junbuml, jfb, RKSimon, bkramer

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D30703

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310055 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-04 12:28:36 +00:00
Nikolai Bozhenov 406ae0691e [InstCombine] Canonicalize clamp of float types to minmax in fast mode.
Summary:
This commit allows matchSelectPattern to recognize clamp of float
arguments in the presence of FMF the same way as already done for
integers.

This case is a little different though. With integers, given the
min/max pattern is recognized, DAGBuilder starts selecting MIN/MAX
"automatically". That is not the case for float, because for them only
full FMINNAN/FMINNUM/FMAXNAN/FMAXNUM ISD nodes exist and they do care
about NaNs. On the other hand, some backends (e.g. X86) have only
FMIN/FMAX nodes that do not care about NaNS and the former NAN/NUM
nodes are illegal thus selection is not happening. So I decided to do
such kind of transformation in IR (InstCombiner) instead of
complicating the logic in the backend.

Reviewers: spatel, jmolloy, majnemer, efriedma, craig.topper

Reviewed By: efriedma

Subscribers: hiraditya, javed.absar, n.bozhenov, llvm-commits

Patch by Andrei Elovikov <andrei.elovikov@intel.com>

Differential Revision: https://reviews.llvm.org/D33186


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310054 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-04 12:22:17 +00:00
Nikolai Bozhenov 8a7f23753e Add some tests for cast+clamp/min/max before D33186.
Summary:
- add more tests
- pr27236.ll: rename %tmpN -> %N because otherwise a FileCheck
  variable for newly appeared unnamed value would use the same name as
  tmpN (as generated by update_test_checks.py)
- run update_test_checks.py

Reviewers: efriedma

Reviewed By: efriedma

Subscribers: n.bozhenov, llvm-commits

Patch by Andrei Elovikov <andrei.elovikov@intel.com>

Differential Revision: https://reviews.llvm.org/D35002


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310053 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-04 12:21:03 +00:00
Max Kazantsev 9a16b8eafb [IRCE] Handle loops with step different from 1/-1
This patch generalizes IRCE to handle IV steps that are not equal to 1 or -1.

Differential Revision: https://reviews.llvm.org/D35539


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310032 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-04 07:01:04 +00:00
Max Kazantsev 0114fa18c0 [IRCE] Recognize loops with unsigned latch conditions
This patch enables recognition of loops with ult/ugt latch conditions.

Differential Revision: https://reviews.llvm.org/D35302


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310027 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-04 05:40:20 +00:00
Teresa Johnson dad922aba2 Use profile summary to disable peeling for huge working sets
Summary:
Detect when the working set size of a profiled application is huge,
by comparing the number of counts required to reach the hot percentile
in the profile summary to a large threshold*.

When the working set size is determined to be huge, disable peeling
to avoid bloating the working set further.

*Note that the selected threshold (15K) is significantly larger than the
largest working set value in SPEC cpu2006 (which is gcc at around 11K).

Reviewers: davidxl

Subscribers: mehdi_amini, mzolotukhin, eraman, llvm-commits

Differential Revision: https://reviews.llvm.org/D36288

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310005 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-03 23:42:58 +00:00
Davide Italiano 0d362a25a4 [NewGVN] Fix the case where we have a phi-of-ops which goes away.
Patch by Daniel Berlin, fixes PR33196 (and probably something else).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309988 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-03 21:17:49 +00:00