Commit Graph

59 Commits

Author SHA1 Message Date
Tony Tye
9272c8addc [AMDGPU] Update OpenCL to use 48 bytes of implicit arguments for AMDGPU
Add two additional implicit arguments for OpenCL for the AMDGPU target using the AMDHSA runtime to support device enqueue.

Differential Revision: https://reviews.llvm.org/D44697


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328351 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-23 18:58:47 +00:00
Tony Tye
2b4b7fe362 [AMDGPU] Remove use of OpenCL triple environment and replace with function attribute for AMDGPU
- Remove use of the opencl and amdopencl environment member of the target triple for the AMDGPU target.
- Use function attribute to communicate to the AMDGPU backend to add implicit arguments for OpenCL kernels for the AMDHSA OS.

Differential Revision: https://reviews.llvm.org/D43736


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328349 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-23 18:45:18 +00:00
Eugene Zelenko
e9a0122a40 [Documentation] Fix markup problem in AMDGPUUsage.rst.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328116 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-21 17:09:35 +00:00
Craig Topper
17ab24c8db [TableGen] Pass result of std::unique to vector::erase instead of calculating a size and calling resize.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328031 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-20 20:24:10 +00:00
Dmitry Preobrazhensky
1eaf2d7b5a [AMDGPU][MC][DOC] Updated AMD GPU assembler description
See bug 36572: https://bugs.llvm.org/show_bug.cgi?id=36572

Differential Revision: https://reviews.llvm.org/D44020

Reviewers: artem.tamazov, vpykhtin

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327288 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-12 15:55:08 +00:00
Tony Tye
636e2230de [AMDGPU] Update AMDGOUUsage.rst descriptions
- Improve description of XNACK ELF flag.
- Rename all uses of wave to wavefront to be consistent.

Differential Revision: https://reviews.llvm.org/D43983


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@326989 91177308-0d34-0410-b5e6-96231b3b80d8
2018-03-08 05:46:01 +00:00
Scott Linder
5e4b515c4b [DebugInfo] Support DWARF v5 source code embedding extension
In DWARF v5 the Line Number Program Header is extensible, allowing values with
new content types. In this extension a content type is added,
DW_LNCT_LLVM_source, which contains the embedded source code of the file.

Add new optional attribute for !DIFile IR metadata called source which contains
source text. Use this to output the source to the DWARF line table of code
objects. Analogously extend METADATA_FILE in Bitcode and .file directive in ASM
to support optional source.

Teach llvm-dwarfdump and llvm-objdump about the new values. Update the output
format of llvm-dwarfdump to make room for the new attribute on file_names
entries, and support embedded sources for the -source option in llvm-objdump.

Differential Revision: https://reviews.llvm.org/D42765



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325970 91177308-0d34-0410-b5e6-96231b3b80d8
2018-02-23 23:01:06 +00:00
Konstantin Zhuravlyov
16290892d3 AMDGPU: Bring elf flags in sync with the spec
- Add MACH flags
- Add XNACK flag
- Add reserved flags
- Minor cleanups in docs

Differential Revision: https://reviews.llvm.org/D43356


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325399 91177308-0d34-0410-b5e6-96231b3b80d8
2018-02-16 22:33:59 +00:00
Yaxun Liu
2930e5c52d [AMDGPU] Change constant addr space to 4
Differential Revision: https://reviews.llvm.org/D43170


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325030 91177308-0d34-0410-b5e6-96231b3b80d8
2018-02-13 18:00:25 +00:00
Matt Arsenault
6f2da0b6ad Reapply "AMDGPU: Add 32-bit constant address space"
This reverts r324494 and reapplies r324487.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324747 91177308-0d34-0410-b5e6-96231b3b80d8
2018-02-09 16:57:57 +00:00
Yaxun Liu
a43548c056 [AMDGPU] Updae documentation about address space
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324617 91177308-0d34-0410-b5e6-96231b3b80d8
2018-02-08 15:41:19 +00:00
Rafael Espindola
c952538085 Revert "AMDGPU: Add 32-bit constant address space"
This reverts commit r324487.

It broke clang tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324494 91177308-0d34-0410-b5e6-96231b3b80d8
2018-02-07 18:09:35 +00:00
Marek Olsak
3afd566557 AMDGPU: Add 32-bit constant address space
Note: This is a candidate for LLVM 6.0, because it was planned to be
      in that release but was delayed due to a long review period.

Merge conflict in release_60 - resolution:
    Add "-p6:32:32" into the second (non-amdgiz) string.

Only scalar loads support 32-bit pointers. An address in a VGPR will
fail to compile. That's OK because the results of loads will only be used
in places where VGPRs are forbidden.

Updated AMDGPUAliasAnalysis and used SReg_64_XEXEC.
The tests cover all uses cases we need for Mesa.

Reviewers: arsenm, nhaehnle

Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D41651

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324487 91177308-0d34-0410-b5e6-96231b3b80d8
2018-02-07 16:01:00 +00:00
Tony Tye
90018a5eac [AMDGPU] Update relocation documentation and elf flag machine architecture numbers
Differential Revision: https://reviews.llvm.org/D42714


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323835 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-30 23:59:43 +00:00
Tony Tye
ae5d34e5ef [AMDGPU] Clarify ReqdWorkGroupSize and MaxFlatWorkGroupSize metadata
- If ReqdWorkGroupSize is present it must have all elements >=1.
- If MaxFlatWorkGroupSize must be consistent with ReqdWorkGroupSize.
- Remove FixedWorkGroupSize as now equivalent to ReqdWorkGroupSize.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323829 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-30 23:07:10 +00:00
Tim Hammerquist
4967d786bb fix invalid footnote syntax
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321839 91177308-0d34-0410-b5e6-96231b3b80d8
2018-01-05 00:24:54 +00:00
Tony Tye
9d223a1998 [AMDGPU] Rename Bonaire target to be gfx704; remove gfx800 and make Iceland and Tonga both use gfx802; update target feature handling
Correct committed version to match intended accepted review D40051 id=123417

- Rename Bonaire target to be gfx704.
- Eliminate gfx800 and make Iceland and Tonga both use gfx802 as they use the same code.
- List target features supported by each processor in the processor table together with the default value.
- Add xnack flag to e_flags.
- Remove xnack from kernel metadata and kernel descriptor since it is now a whole code object property.

Differential Revision: https://reviews.llvm.org/D40051


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320457 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-12 05:47:00 +00:00
Tony Tye
c865d8aba4 [AMDGPU] Rename Bonaire target to be gfx704; update target feature handling
- Rename Bonaire target to be gfx704.
- Eliminate gfx800 and make Iceland and Tonga both use gfx802 as they use the same code.
- List target features supported by each processor in the processor table together with the default value.
- Add xnack flag to e_flags.
- Remove xnack from kernel metadata and kernel descriptor since it is now a whole code object property.

Differential Revision: https://reviews.llvm.org/D40051



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320378 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-11 15:35:27 +00:00
Mark Searles
f534f4a24f [AMDGPU] Fix typo in Kernel Descriptor for GFX6-GFX9
Differential Revision: https://reviews.llvm.org/D40981

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320087 91177308-0d34-0410-b5e6-96231b3b80d8
2017-12-07 21:24:27 +00:00
Konstantin Zhuravlyov
a9edc75bfd AMDGPU: Add num spilled s/vgprs to metadata
This was requested by tools.

Differential Revision: https://reviews.llvm.org/D40321


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@319192 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-28 17:51:08 +00:00
Tony Tye
995388dd36 [AMDGPU] Correct targets that support XNACK
Differential Revision: https://reviews.llvm.org/D39887


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317955 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-11 00:50:32 +00:00
Tony Tye
2f2cb6b2a2 [AMDGPU] AMDGPUUsage.rst minor corrections
Differential Revision: https://reviews.llvm.org/D39887


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317924 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-10 20:51:43 +00:00
Tony Tye
9000e8c60d [AMDGPU] Update code object description
- Use ELF header flags to identify processor.
 - Remove isa note record.
 - Add target feature section.
 - Make metadata for NumVGPRs, NumSGPRs and MaxFlatWorkGroupSize required.
 - Add FixedWorkGroupSize to CodeProps metadata.
 - Add ReqdWorkGroupSize* to kernel descriptor and move MaxFlatWorkGroupSize to be adjacent.
 - Move IsXNACKEnabled in the kernel descriptor to be at the end of the unused flags.
 - Remove IsDynamicCallStack from the metadata and kernel descriptor.
 - Remove legacy debugger metadata.
 - Remove old XNACK enabled processor names.

Differential Revision: https://reviews.llvm.org/D39828


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317855 91177308-0d34-0410-b5e6-96231b3b80d8
2017-11-10 01:00:54 +00:00
Yaxun Liu
a52756b2c9 [AMDGPU] Emit metadata for hidden arguments for kernel enqueue
Identifies kernels which performs device side kernel enqueues and emit
metadata for the associated hidden kernel arguments. Such kernels are
marked with calls-enqueue-kernel function attribute by
AMDGPUOpenCLEnqueueKernelLowering pass and later on
hidden kernel arguments metadata HiddenDefaultQueue and
HiddenCompletionAction are emitted for them.

Differential Revision: https://reviews.llvm.org/D39255


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316907 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-30 14:30:28 +00:00
Konstantin Zhuravlyov
cb5868c4b8 AMDGPU/Docs: Fix unreadable characters
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316171 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-19 17:12:55 +00:00
Tony Tye
0a09220c32 [AMDGPU] Corrections to memory model description.
- Add description on nontemporal support.
 - Correct OpenCL sequentially consistent and fence code sequences.
 - Minor test cleanup.

Differential Revision: https://reviews.llvm.org/D39073


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316131 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-18 22:16:55 +00:00
Konstantin Zhuravlyov
a05cf7b27d AMDGPU/Docs: Make target naming consistent
- R600 Arch: Use Radeon HD XXXX Series
  - GCN Arch: Use GFXX

Differential Revision: https://reviews.llvm.org/D39019


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316100 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-18 17:59:20 +00:00
Konstantin Zhuravlyov
28cb7901b7 AMDGPU: Rename MaxFlatWorkgroupSize to MaxFlatWorkGroupSize for consistency
Differential Revision: https://reviews.llvm.org/D38957


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316097 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-18 17:31:09 +00:00
Tony Tye
300ec0aaa2 Add base relative relocation record that can be used for the following case (OpenCL example):
static __global int Var = 0; 
__global int* Ptr[] = {&Var};
...

In this case Var is a non premptable symbol and so its address can be used as the value of Ptr, with a base relative relocation that will add the delta between the ELF address and the actual load address. Such relocations do not require a symbol.

Differential Revision: https://reviews.llvm.org/D38909


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315935 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-16 20:44:29 +00:00
Konstantin Zhuravlyov
755155fab9 AMDGPU: Add AMDGPU HSA Kernel Descriptor
- Update docs to match llvm coding style
  - Add missing FP16_OVFL bit for gfx9
  - Fix the size of the kernel descriptor in the docs

Differential Revision: https://reviews.llvm.org/D38902


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315822 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-14 19:17:08 +00:00
Konstantin Zhuravlyov
5556d8485b AMDGPU: Bring HSA metadata on par with the specification
Differential Revision: https://reviews.llvm.org/D38753


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315821 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-14 19:03:51 +00:00
Yaxun Liu
091c043b90 [AMDGPU] Lower enqueued blocks and generate runtime metadata
This patch adds a post-linking pass which replaces the function pointer of enqueued
block kernel with a global variable (runtime handle) and adds
runtime-handle attribute to the enqueued block kernel.

In LLVM CodeGen the runtime-handle metadata will be translated to
RuntimeHandle metadata in code object. Runtime allocates a global buffer
for each kernel with RuntimeHandel metadata and saves the kernel address
required for the AQL packet into the buffer. __enqueue_kernel function
in device library knows that the invoke function pointer in the block
literal is actually runtime handle and loads the kernel address from it
and puts it into AQL packet for dispatching.

This cannot be done in FE since FE cannot create a unique global variable
with external linkage across LLVM modules. The global variable with internal
linkage does not work since optimization passes will try to replace loads
of the global variable with its initialization value.

Differential Revision: https://reviews.llvm.org/D38610


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315352 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-10 19:39:48 +00:00
Konstantin Zhuravlyov
eb47c09ba9 AMDGPU/Docs: Follow up on review feedback in https://reviews.llvm.org/D38387
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314848 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-03 21:18:03 +00:00
Konstantin Zhuravlyov
4b145dd117 AMDGPU: Add ELFOSABI_AMDGPU_MESA3D
Differential Revision: https://reviews.llvm.org/D38387


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314846 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-03 21:14:14 +00:00
Konstantin Zhuravlyov
7624630b81 AMDGPU: Add ELFOSABI_AMDGPU_PAL
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314843 91177308-0d34-0410-b5e6-96231b3b80d8
2017-10-03 20:54:07 +00:00
Tony Tye
1a0450faf1 Update AMDGPUUsage.rst documentation:
1. Correct description of the kernel initial state for FLAT_SCRATCH_INIT.
    2. Add link to GFX9 architecture documentation.
    3. Update product names.
    4. Rename note record from NT_AMD_AMDGPU_METADATA to NT_AMD_AMDGPU_HSA_METADATA and move description to the AMDHSA coding convention section.
    5. Minor typo corrections.

Differential Revision: https://reviews.llvm.org/D36549


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310954 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-15 20:47:41 +00:00
Konstantin Zhuravlyov
84577c6f35 AMDGPU: Also remove SI from docs
Differential Revision: https://reviews.llvm.org/D36424


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310335 91177308-0d34-0410-b5e6-96231b3b80d8
2017-08-08 04:28:31 +00:00
Tony Tye
af26c83f3b Correct GFX9 processor names.
Differential Revision: https://reviews.llvm.org/D33736



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307353 91177308-0d34-0410-b5e6-96231b3b80d8
2017-07-07 03:10:01 +00:00
Sylvestre Ledru
e9d67e46c2 fix various typos
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306262 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-26 02:45:39 +00:00
Tony Tye
5db707b0ff Correct AMDGPU Hawaii and Kabini target names
The FirePro and Radeon versions of Hawaii have different 64 bit floating point configurations so use distinct target names for them. Rename the target name for Kabini to accommodate.

Differential Revision: https://reviews.llvm.org/D34016


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304959 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-08 01:47:25 +00:00
Tony Tye
04631fc848 Try to work around possible bugs in version of Shpinx on buildserver.
Builds sucessfully with Sphinx v1.5.5

Differential Revision: https://reviews.llvm.org/D33736


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304853 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-07 00:46:08 +00:00
Tony Tye
61c7e03d0a Add documentation for various aspects of the AMDGPU backend.
Remove extra tabs.
Builds sucessfully with Sphinx v1.5.5

Differential Revision: https://reviews.llvm.org/D33736


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304848 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-07 00:08:35 +00:00
Tony Tye
698655354d Add documentation for various aspects of the AMDGPU backend.
Differential Revision: https://reviews.llvm.org/D33736


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304831 91177308-0d34-0410-b5e6-96231b3b80d8
2017-06-06 20:31:59 +00:00
Aaron Ballman
d3d0cd648c Fixing a malformed RST table to get the documentation bot back to green.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301545 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-27 14:33:01 +00:00
Matt Arsenault
666020a37d AMDGPU: Move trap lowering to DAG
Fixes traps in any block besides the entry block,
and fixes depending on a live-in physical register
by using a virtual register copy.

Also happens to stop emitting a nop in the case
debug trap is not supported.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301206 91177308-0d34-0410-b5e6-96231b3b80d8
2017-04-24 17:49:13 +00:00
Konstantin Zhuravlyov
2cee5cc825 [DebugInfo] Emit address space with DW_AT_address_class attribute for pointer and reference types
Differential Revision: https://reviews.llvm.org/D29670


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@297320 91177308-0d34-0410-b5e6-96231b3b80d8
2017-03-08 23:55:44 +00:00
Wei Ding
8d22e6f3bb AMDGPU : AMDGPU : Update AMDGPU Trap Handler ABI.
Differential Revision: http://reviews.llvm.org/D29913

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295745 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-21 18:48:01 +00:00
Aaron Ballman
342bf77f71 Correcting several sphinx errors; should fix the LLVM documentation build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294865 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-11 18:45:24 +00:00
Wei Ding
c75c94d0eb AMDGPU : Add trap handler support.
Differential Revision: http://reviews.llvm.org/D26010

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@294692 91177308-0d34-0410-b5e6-96231b3b80d8
2017-02-10 02:15:29 +00:00
Sylvestre Ledru
1d6becb423 fix some typos in the doc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@292014 91177308-0d34-0410-b5e6-96231b3b80d8
2017-01-14 11:37:01 +00:00