Matt Arsenault 00c3986254 R600: Mostly remove remaining AMDIL intrinsics. ...

Delete all unused ones, and add new AMDGPU named intrinsics for
the ones that are. Handle the old AMDIL names for comptability (although
remove their GCCBuiltin names) and add tests since there weren't any
for these before.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210827 91177308-0d34-0410-b5e6-96231b3b80d8

2014-06-12 21:15:44 +00:00

..

AArch64

[AArch64] Basic Sched Model for Cortex-A57.

2014-06-11 21:06:56 +00:00

ARM

CodeGen: enable mov.w/mov.t pairs with minsize for WoA

2014-06-12 20:06:33 +00:00

CPP

Reduce verbiage of lit.local.cfg files

2014-06-09 22:42:55 +00:00

Generic

Add a new attribute called 'jumptable' that creates jump-instruction tables for functions marked with this attribute.

2014-06-05 19:29:43 +00:00

Hexagon

Reduce verbiage of lit.local.cfg files

2014-06-09 22:42:55 +00:00

Inputs

Debug Info: update testing cases to specify the debug info version number.

2013-11-22 21:49:45 +00:00

Mips

[mips][mips64r6] bc1[tf] are not available on MIPS32r6/MIPS64r6

2014-06-12 15:00:17 +00:00

MSP430

Reduce verbiage of lit.local.cfg files

2014-06-09 22:42:55 +00:00

NVPTX

Reduce verbiage of lit.local.cfg files

2014-06-09 22:42:55 +00:00

PowerPC

[PPC64LE] Recognize shufflevector patterns for little endian

2014-06-10 14:35:01 +00:00

R600

R600: Mostly remove remaining AMDIL intrinsics.

2014-06-12 21:15:44 +00:00

SPARC

Reduce verbiage of lit.local.cfg files

2014-06-09 22:42:55 +00:00

SystemZ

Reduce verbiage of lit.local.cfg files

2014-06-09 22:42:55 +00:00

Thumb

Disable the load/store optimization pass for Thumb-1.

2014-06-12 15:18:33 +00:00

Thumb2

Reduce verbiage of lit.local.cfg files

2014-06-09 22:42:55 +00:00

X86

[FastISel][X86] Argument lowering test case

2014-06-12 20:34:09 +00:00

XCore

Reduce verbiage of lit.local.cfg files

2014-06-09 22:42:55 +00:00