Sam Parker b67279b795 [AArch64] v8.3-a complex number support ...

New instructions are added to AArch32 and AArch64 to aid
floating-point multiplication and addition of complex numbers,
where the complex numbers are packed in a vector register as a
pair of elements. The Imaginary part of the number is placed in the
more significant element, and the Real part of the number is placed
in the less significant element.

Differential Revision: https://reviews.llvm.org/D36792


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312228 91177308-0d34-0410-b5e6-96231b3b80d8

2017-08-31 09:27:04 +00:00

..

AArch64

[AArch64] v8.3-a complex number support

2017-08-31 09:27:04 +00:00

AMDGPU

[AMDGPU][MC][GFX9] Added op_sel support for v_mad_*16, v_fma_f16, v_div_fixup_f16

2017-08-16 15:16:32 +00:00

ARC

[ARC] Add ARC backend.

2017-08-24 15:40:33 +00:00

ARM

[ARM][AArch64] v8.3-A Javascript Conversion

2017-08-22 11:08:21 +00:00

Hexagon

[Hexagon] Replace instruction definitions with auto-generated ones

2017-02-10 15:33:13 +00:00

Lanai

[lanai] Add Lanai backend.

2016-03-28 13:09:54 +00:00

Mips

Revert "Reland "[mips][mt][6/7] Add support for mftr, mttr instructions.""

2017-08-14 16:20:33 +00:00

PowerPC

[Power9] Add new instructions for floating point status and control registers.

2017-08-28 18:46:01 +00:00

Sparc

This change adds co-processor condition branching and conditional traps to the Sparc back-end.

2016-03-09 18:20:21 +00:00

SystemZ

[SystemZ] Add support for IBM z14 processor (3/3)

2017-07-17 17:44:20 +00:00

X86

Revert "The current version of LLVM X86 disassembler incorrectly interprets some possible sets of x86 prefixes. This patch is the first step to close PR7709 and PR17697. There will be next patch(es) to close relative PRs." temporarily while some regressions are addressed.

2017-08-29 08:23:46 +00:00

XCore

Reduce verbiage of lit.local.cfg files

2014-06-09 22:42:55 +00:00