llvm/lib/Target/CellSPU
2010-03-05 18:55:36 +00:00
..
AsmPrinter print all the newlines at the end of instructions with 2010-02-10 00:36:00 +00:00
TargetInfo make -fno-rtti the default unless a directory builds with REQUIRES_RTTI. 2010-01-24 20:43:08 +00:00
CellSDKIntrinsics.td Merge current work back to tree to minimize diffs and drift. Major highlights 2008-02-23 18:41:37 +00:00
CMakeLists.txt Normalize makefile comments and sort cmake file lists. 2009-08-31 13:05:24 +00:00
Makefile make -fno-rtti the default unless a directory builds with REQUIRES_RTTI. 2010-01-24 20:43:08 +00:00
README.txt CellSPU: 2009-01-21 04:58:48 +00:00
SPU64InstrInfo.td disable two patterns that are using non-sensical result pattern types. 2010-02-23 07:21:15 +00:00
SPU128InstrInfo.td CellSPU: 2009-01-21 04:58:48 +00:00
SPU.h Revert this patch for the time being. Needs more testing. 2010-02-25 02:32:54 +00:00
SPU.td - Start moving target-dependent nodes that could be represented by an 2008-12-30 23:28:25 +00:00
SPUCallingConv.td CellSPU: 2009-01-06 23:10:38 +00:00
SPUFrameInfo.cpp Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
SPUFrameInfo.h Bug fixes and updates for CellSPU, syncing up with trunk. Most notable 2008-04-30 00:30:08 +00:00
SPUHazardRecognizers.cpp eliminate the last DOUTs from the targets. 2009-08-23 06:49:22 +00:00
SPUHazardRecognizers.h Generalize the HazardRecognizer interface so that it can be used 2009-01-15 22:18:12 +00:00
SPUInstrBuilder.h Fix constant pool loads, and remove broken versions of addConstantPoolReference. 2008-09-06 01:11:01 +00:00
SPUInstrFormats.td CellSPU: 2009-01-26 22:33:37 +00:00
SPUInstrInfo.cpp Remove the target hook TargetInstrInfo::BlockHasNoFallThrough in favor of 2009-12-05 00:44:40 +00:00
SPUInstrInfo.h Remove the target hook TargetInstrInfo::BlockHasNoFallThrough in favor of 2009-12-05 00:44:40 +00:00
SPUInstrInfo.td Remove ISD::DEBUG_LOC and ISD::DBG_LABEL, which are no longer used. 2009-11-23 23:20:51 +00:00
SPUISelDAGToDAG.cpp Sink InstructionSelect() out of each target into SDISel, and rename it 2010-03-02 06:34:30 +00:00
SPUISelLowering.cpp Remove dead parameter passing. 2010-03-02 01:55:18 +00:00
SPUISelLowering.h Revert 95130. 2010-02-02 23:55:14 +00:00
SPUMachineFunction.h Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
SPUMathInstr.td Untabify code. 2009-01-26 03:37:41 +00:00
SPUMCAsmInfo.cpp fix bss section printing for cell, patch by Kalle Raiskila! 2010-03-05 18:55:36 +00:00
SPUMCAsmInfo.h Rename TargetAsmInfo (and its subclasses) to MCAsmInfo. 2009-08-22 20:48:53 +00:00
SPUNodes.td 128-bit sign extension and vector shift cleanups, contributed by Ken Werner 2009-08-24 22:28:53 +00:00
SPUOperands.td Split EVT into MVT and EVT, the former representing _just_ a primitive type, while 2009-08-11 20:47:22 +00:00
SPURegisterInfo.cpp Revert this patch for the time being. Needs more testing. 2010-02-25 02:32:54 +00:00
SPURegisterInfo.h Revert this patch for the time being. Needs more testing. 2010-02-25 02:32:54 +00:00
SPURegisterInfo.td CellSPU: 2009-01-06 23:10:38 +00:00
SPURegisterNames.h Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
SPUSchedule.td Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
SPUSubtarget.cpp Normalize Subtarget constructors to take a target triple string instead of 2009-08-02 22:11:08 +00:00
SPUSubtarget.h indicate what the native integer types for the target are. 2009-11-07 19:07:32 +00:00
SPUTargetMachine.cpp Rename TargetAsmInfo (and its subclasses) to MCAsmInfo. 2009-08-22 20:48:53 +00:00
SPUTargetMachine.h Change TargetAsmInfo to be constructed via TargetRegistry from a Target+Triple 2009-08-12 07:22:17 +00:00

//===- README.txt - Notes for improving CellSPU-specific code gen ---------===//

This code was contributed by a team from the Computer Systems Research
Department in The Aerospace Corporation:

- Scott Michel (head bottle washer and much of the non-floating point
  instructions)
- Mark Thomas (floating point instructions)
- Michael AuYeung (intrinsics)
- Chandler Carruth (LLVM expertise)
- Nehal Desai (debugging, i32 operations, RoadRunner SPU expertise)

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, NONINFRINGEMENT, OR
OTHERWISE.  IN NO EVENT SHALL THE AEROSPACE CORPORATION BE LIABLE FOR DAMAGES
OF ANY KIND OR NATURE WHETHER BASED IN CONTRACT, TORT, OR OTHERWISE ARISING
OUT OF OR IN CONNECTION WITH THE USE OF THE SOFTWARE INCLUDING, WITHOUT
LIMITATION, DAMAGES RESULTING FROM LOST OR CONTAMINATED DATA, LOST PROFITS OR
REVENUE, COMPUTER MALFUNCTION, OR FOR ANY SPECIAL, INCIDENTAL, CONSEQUENTIAL,
OR PUNITIVE  DAMAGES, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES OR
SUCH DAMAGES ARE FORESEEABLE.

---------------------------------------------------------------------------
--WARNING--:
--WARNING--: The CellSPU work is work-in-progress and "alpha" quality code.
--WARNING--:

If you are brave enough to try this code or help to hack on it, be sure
to add 'spu' to configure's --enable-targets option, e.g.:

        ./configure <your_configure_flags_here> \
           --enable-targets=x86,x86_64,powerpc,spu

---------------------------------------------------------------------------

TODO:
* Create a machine pass for performing dual-pipeline scheduling specifically
  for CellSPU, and insert branch prediction instructions as needed.

* i32 instructions:

  * i32 division (work-in-progress)

* i64 support (see i64operations.c test harness):

  * shifts and comparison operators: done
  * sign and zero extension: done
  * addition: done
  * subtraction: needed
  * multiplication: done

* i128 support:

  * zero extension, any extension: done
  * sign extension: needed
  * arithmetic operators (add, sub, mul, div): needed
  * logical operations (and, or, shl, srl, sra, xor, nor, nand): needed

    * or: done

* f64 support

  * Comparison operators:
    SETOEQ              unimplemented
    SETOGT              unimplemented
    SETOGE              unimplemented
    SETOLT              unimplemented
    SETOLE              unimplemented
    SETONE              unimplemented
    SETO                done (lowered)
    SETUO               done (lowered)
    SETUEQ              unimplemented
    SETUGT              unimplemented
    SETUGE              unimplemented
    SETULT              unimplemented
    SETULE              unimplemented
    SETUNE              unimplemented

* LLVM vector suport

  * VSETCC needs to be implemented. It's pretty straightforward to code, but
    needs implementation.

* Intrinsics

  * spu.h instrinsics added but not tested. Need to have an operational
    llvm-spu-gcc in order to write a unit test harness.

===-------------------------------------------------------------------------===