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07df765e65
Now if we can transform an alloca into a single vector value, but it has subvector, non-element accesses, we form the appropriate shufflevectors to allow SROA to proceed. This fixes PR14055 which pointed out a very common pattern that SROA couldn't handle -- mixed vec3 and vec4 operations on a single alloca. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168418 91177308-0d34-0410-b5e6-96231b3b80d8 |
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| .. | ||
| ADCE | ||
| ArgumentPromotion | ||
| BBVectorize | ||
| BlockPlacement | ||
| BranchFolding | ||
| CodeExtractor | ||
| CodeGenPrepare | ||
| ConstantMerge | ||
| ConstProp | ||
| CorrelatedValuePropagation | ||
| DeadArgElim | ||
| DeadStoreElimination | ||
| EarlyCSE | ||
| FunctionAttrs | ||
| GlobalDCE | ||
| GlobalOpt | ||
| GVN | ||
| IndVarSimplify | ||
| Inline | ||
| InstCombine | ||
| InstSimplify | ||
| Internalize | ||
| IPConstantProp | ||
| JumpThreading | ||
| LCSSA | ||
| LICM | ||
| LoopDeletion | ||
| LoopIdiom | ||
| LoopRotate | ||
| LoopSimplify | ||
| LoopStrengthReduce | ||
| LoopUnroll | ||
| LoopUnswitch | ||
| LoopVectorize | ||
| LowerAtomic | ||
| LowerExpectIntrinsic | ||
| LowerInvoke | ||
| LowerSwitch | ||
| Mem2Reg | ||
| MemCpyOpt | ||
| MergeFunc | ||
| MetaRenamer | ||
| ObjCARC | ||
| PhaseOrdering | ||
| PruneEH | ||
| Reassociate | ||
| ScalarRepl | ||
| SCCP | ||
| SimplifyCFG | ||
| SimplifyLibCalls | ||
| Sink | ||
| SROA | ||
| StripSymbols | ||
| TailCallElim | ||
| TailDup | ||