Evan Cheng ee9e1b0a85 On some targets, non-move instructions can become move instructions because of coalescing. e.g. ... vr2 = OR vr0, vr1 => vr2 = OR vr1, vr1 // after coalescing vr0 with vr1 Update the value# of the destination register with the copy instruction if that happens. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56165 91177308-0d34-0410-b5e6-96231b3b80d8		2008-09-12 18:13:14 +00:00
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Analysis	Rather than marking all internal globals "Ref"	2008-09-12 07:29:58 +00:00
Archive
AsmParser	Update generated files.	2008-09-09 01:13:24 +00:00
Bitcode	Temporarily disable vector select in the bitcode reader. The	2008-09-09 02:08:49 +00:00
CodeGen	On some targets, non-move instructions can become move instructions because of coalescing. e.g.	2008-09-12 18:13:14 +00:00
Debugger	Add #include	2008-08-23 21:34:34 +00:00
ExecutionEngine	Make safer variant of alias resolution routine to be default	2008-09-09 20:05:04 +00:00
Linker	Make safer variant of alias resolution routine to be default	2008-09-09 20:05:04 +00:00
Support	Updating VC++ project.	2008-08-24 11:56:40 +00:00
System	add a helper method to sys::Path for clang, patch by	2008-08-11 23:39:47 +00:00
Target	Rename ConstantSDNode::getValue to getZExtValue, for consistency	2008-09-12 16:56:44 +00:00
Transforms	On 64-bit targets, change 32-bit getelementptr indices to be 64-bit	2008-09-11 23:06:38 +00:00
VMCore	Add assertion check.	2008-09-09 21:38:40 +00:00
Makefile