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Tim Northover 291cd09645 ARM64: make sure FastISel emits SSA MachineInstrs
We need to use a temporary register for a 2-step operation like REM.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208297 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-08 10:30:56 +00:00
autoconf
bindings [OCaml] Add an ocamlfind package llvm.all_backends. 2014-05-01 21:00:52 +00:00
cmake Disable -Wcomment when building with GCC. 2014-05-06 09:46:06 +00:00
docs IR: Don't allow non-default visibility on local linkage 2014-05-07 22:57:20 +00:00
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include Move late partial-unrolling thresholds into the processor definitions 2014-05-08 09:14:44 +00:00
lib ARM64: make sure FastISel emits SSA MachineInstrs 2014-05-08 10:30:56 +00:00
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test ARM64: make sure FastISel emits SSA MachineInstrs 2014-05-08 10:30:56 +00:00
tools Remove the UseCFI option from createAsmStreamer. 2014-05-07 13:00:43 +00:00
unittests Replace a virtual with an override. 2014-05-07 19:52:32 +00:00
utils Move late partial-unrolling thresholds into the processor definitions 2014-05-08 09:14:44 +00:00
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CMakeLists.txt [CMake] Add build rules for llvm-PerfectShuffle utility 2014-05-07 16:54:00 +00:00
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