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Code Issues Packages Projects Releases 10 Wiki Activity
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29b4ba0da5e5d5897d48cb33a3f2ded653aede78
llvm/test/CodeGen/MIR
T
History
Quentin Colombet 3dc8933433 [MIR] Teach the parser how to deal with register banks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265802 91177308-0d34-0410-b5e6-96231b3b80d8
2016-04-08 16:40:43 +00:00
..
AArch64
[AArch64] Allow loads with imp-def to be handled in getMemOpBaseRegImmOfsWidth()
2016-03-31 20:53:47 +00:00
AMDGPU
When printing MIR, output to errs() rather than outs().
2016-02-19 00:18:46 +00:00
ARM
Add MachineFunctionProperty checks for AllVRegsAllocated for target passes
2016-04-04 17:09:25 +00:00
Generic
When printing MIR, output to errs() rather than outs().
2016-02-19 00:18:46 +00:00
Mips
When printing MIR, output to errs() rather than outs().
2016-02-19 00:18:46 +00:00
NVPTX
When printing MIR, output to errs() rather than outs().
2016-02-19 00:18:46 +00:00
PowerPC
When printing MIR, output to errs() rather than outs().
2016-02-19 00:18:46 +00:00
X86
[MIR] Teach the parser how to deal with register banks.
2016-04-08 16:40:43 +00:00
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