llvm/test/MC
Chad Rosier 096c0a0331 [Mips Disassembler] Have the DecodeCCRRegisterClass function use the getReg
function to lookup the proper tablegen'ed register enumeration.  Previously,
it was using the encoded value directly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185026 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-26 22:23:32 +00:00
..
AArch64 AArch64: fix overzealous NEXTing for Windows testing. 2013-06-23 15:32:01 +00:00
ARM ARM: fix more cases where predication may or may not be allowed 2013-06-26 16:52:40 +00:00
AsmParser Fix a bug in the MC asm parser evaluating expressions. It was treating: 2013-05-07 21:40:58 +00:00
COFF [mc-coff] Forward Linker Option flags into the .drectve section 2013-04-25 19:34:41 +00:00
Disassembler [Mips Disassembler] Have the DecodeCCRRegisterClass function use the getReg 2013-06-26 22:23:32 +00:00
ELF [MC/DWARF] Generate multiple .debug_line entries for adjacent .loc directives 2013-06-19 21:27:27 +00:00
MachO
Markup
MBlaze
Mips [mips] Do not emit ".option pic0" if target is mips64. 2013-06-26 19:08:49 +00:00
PowerPC [PowerPC] Accept 17-bit signed immediates for addis 2013-06-26 13:49:53 +00:00
SystemZ [SystemZ] Immediate compare-and-branch support 2013-05-29 11:58:52 +00:00
X86 Add support for encoding the HLE XACQUIRE and XRELEASE prefixes. 2013-06-18 17:08:10 +00:00