llvm/lib/Target/XCore
Juergen Ributzka 354362524a [weak vtables] Remove a bunch of weak vtables
This patch removes most of the trivial cases of weak vtables by pinning them to
a single object file. The memory leaks in this version have been fixed. Thanks
Alexey for pointing them out.

Differential Revision: http://llvm-reviews.chandlerc.com/D2068

Reviewed by Andy

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195064 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-19 00:57:56 +00:00
..
Disassembler Stop leaking register infos in the disassemblers. 2013-08-03 22:16:16 +00:00
InstPrinter [XCore] Make use of the target independent global address offset folding. 2013-05-04 17:24:33 +00:00
MCTargetDesc XCore target: implement exception handling 2013-11-13 10:19:31 +00:00
TargetInfo Move all of the header files which are involved in modelling the LLVM IR 2013-01-02 11:36:10 +00:00
CMakeLists.txt Target/XCore/CMakeLists.txt: Add XCoreTargetTransformInfo.cpp. 2013-09-18 12:59:41 +00:00
LLVMBuild.txt Add XCore disassembler. 2012-12-16 17:29:14 +00:00
Makefile Add instruction encodings and disassembly for 1r instructions. 2012-12-16 17:37:34 +00:00
README.txt test commit 2013-07-29 09:23:13 +00:00
XCore.h Prevent LoopVectorizer and SLPVectorizer running if the target has no vector registers. 2013-09-18 12:43:35 +00:00
XCore.td Change XCoreAsmPrinter to lower MachineInstrs to MCInsts before emission. 2012-12-16 16:20:48 +00:00
XCoreAsmPrinter.cpp Add a helper getSymbol to AsmPrinter. 2013-10-29 17:07:16 +00:00
XCoreCallingConv.td Add support for trampolines on the XCore. 2011-02-02 14:57:41 +00:00
XCoreFrameLowering.cpp XCore target: implement exception handling 2013-11-13 10:19:31 +00:00
XCoreFrameLowering.h Move the eliminateCallFramePseudoInstr method from TargetRegisterInfo 2013-02-21 20:05:00 +00:00
XCoreInstrFormats.td [XCore] Add missing 2r instructions. 2013-02-17 22:38:05 +00:00
XCoreInstrInfo.cpp [weak vtables] Remove a bunch of weak vtables 2013-11-19 00:57:56 +00:00
XCoreInstrInfo.h [weak vtables] Remove a bunch of weak vtables 2013-11-19 00:57:56 +00:00
XCoreInstrInfo.td Add XCore support for ATOMIC_FENCE. 2013-11-12 10:11:26 +00:00
XCoreISelDAGToDAG.cpp [XCore] Fix instruction selection for zext, mkmsk instructions. 2013-07-02 14:46:34 +00:00
XCoreISelLowering.cpp XCore target: implement exception handling 2013-11-13 10:19:31 +00:00
XCoreISelLowering.h Add XCore support for ATOMIC_FENCE. 2013-11-12 10:11:26 +00:00
XCoreLowerThreadLocal.cpp XCore target: fix bug in XCoreLowerThreadLocal.cpp 2013-10-11 10:26:48 +00:00
XCoreMachineFunctionInfo.cpp Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 2012-02-18 12:03:15 +00:00
XCoreMachineFunctionInfo.h Sort includes for all of the .h files under the 'lib' tree. These were 2012-12-04 07:12:27 +00:00
XCoreMCInstLower.cpp Add a helper getSymbol to AsmPrinter. 2013-10-29 17:07:16 +00:00
XCoreMCInstLower.h Update comments to match recommended doxygen style. 2012-12-17 12:13:41 +00:00
XCoreRegisterInfo.cpp Don't cache the instruction and register info from the TargetMachine, because 2013-06-07 21:04:35 +00:00
XCoreRegisterInfo.h Don't cache the instruction and register info from the TargetMachine, because 2013-06-07 21:04:35 +00:00
XCoreRegisterInfo.td [XCore] The RRegs register class is a superset of GRRegs. 2013-04-04 19:57:46 +00:00
XCoreSelectionDAGInfo.cpp Implement a bunch more TargetSelectionDAGInfo infrastructure. 2010-05-11 17:31:57 +00:00
XCoreSelectionDAGInfo.h Implement a bunch more TargetSelectionDAGInfo infrastructure. 2010-05-11 17:31:57 +00:00
XCoreSubtarget.cpp Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 2012-02-18 12:03:15 +00:00
XCoreSubtarget.h Sort includes for all of the .h files under the 'lib' tree. These were 2012-12-04 07:12:27 +00:00
XCoreTargetMachine.cpp Prevent LoopVectorizer and SLPVectorizer running if the target has no vector registers. 2013-09-18 12:43:35 +00:00
XCoreTargetMachine.h Prevent LoopVectorizer and SLPVectorizer running if the target has no vector registers. 2013-09-18 12:43:35 +00:00
XCoreTargetObjectFile.cpp [XCore] Use static relocation model by default. 2013-05-04 16:40:58 +00:00
XCoreTargetObjectFile.h Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 2012-02-18 12:03:15 +00:00
XCoreTargetTransformInfo.cpp More XCore TTI cleanup -- remove an unused private field flagged by 2013-09-18 14:11:11 +00:00

To-do
-----

* Instruction encodings
* Tailcalls
* Investigate loop alignment
* Add builtins