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3ed535e97783eefb70ff27b2bc214bed425007cd
These instructions only read 64-bits of memory so we shouldn't allow a full vector width load to be pattern matched in case it is marked volatile. Instead allow vzload or scalar_to_vector+load. Also add a DAG combine to turn full vector loads into vzload when used by one of these instructions if the load isn't volatile. This fixes another case for PR42079 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364838 91177308-0d34-0410-b5e6-96231b3b80d8
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