llvm/test/CodeGen/MIR at 437c585311bc817bc128eaabcbbd9faba37a8045 - llvm

RPCS3/llvm

mirror of https://github.com/RPCS3/llvm.git synced 2026-08-26 18:26:51 -04:00

Files

T

Justin Bogner b86967b006 MIR: Allow parsing of empty machine functions

If you run llc -stop-after=codegenprepare and feed the resulting MIR
to llc -start-after=codegenprepare, you'll have an empty machine
function since we haven't run any isel yet. Of course, this only works
if the MIRParser believes you that this is okay.

This is essentially a revert of r241862 with a fix for the problem it
was papering over.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299975 91177308-0d34-0410-b5e6-96231b3b80d8

2017-04-11 19:32:41 +00:00

AArch64

MIR: parse & print the atomic parts of a MachineMemOperand.

2017-02-13 22:14:08 +00:00

AMDGPU

AMDGPU: Remove legacy bfe intrinsics

2017-04-03 18:08:08 +00:00

ARM

Move test to correct directory

2016-12-17 02:16:26 +00:00

Generic

MIR: Allow parsing of empty machine functions

2017-04-11 19:32:41 +00:00

Hexagon

Move .mir tests to appropriate directories

2016-12-09 19:08:15 +00:00

Mips

MIRParser: Use shorter cfi identifiers

2016-07-26 18:20:00 +00:00

NVPTX

llc: Add support for -run-pass none

2016-07-16 02:24:59 +00:00

PowerPC

MIRParser/MIRPrinter: Compute isSSA instead of printing/parsing it.

2016-08-24 01:32:41 +00:00

X86

[MIR] Test assumes x64 windows calling convention upon printing/parsing MIR output/input.

2017-03-19 13:23:20 +00:00

README

Add README describing the intention of test/CodeGen/MIR

2016-12-09 20:16:12 +00:00

README

This directory contains tests for the MIR file format parser and printer. It
was necessary to split the tests across different targets as no single target
covers all features available in machine IR.

Tests for codegen passes should NOT be here but in test/CodeGen/sometarget. As
a rule of thumb this directory should only contain tests using
'llc -run-pass none'.