llvm/test/CodeGen
Venkatraman Govindaraju 447c3480e5 [Sparc] Handle atomic loads/stores in sparc backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198286 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-01 22:11:54 +00:00
..
AArch64 For AArch64 Neon, simplify scalar dup by lane0 for fp. 2013-12-30 02:44:35 +00:00
ARM Un-XFAILify some tests which are now passing. 2013-12-29 23:09:14 +00:00
CPP Begin adding docs and IR-level support for the inalloca attribute 2013-12-19 02:14:12 +00:00
Generic Fix pr18235. 2013-12-13 16:05:32 +00:00
Hexagon Debug Info: update testing cases to specify the debug info version number. 2013-11-22 21:49:45 +00:00
Inputs Debug Info: update testing cases to specify the debug info version number. 2013-11-22 21:49:45 +00:00
Mips [Mips] Does not take in account 'use-soft-float' attribute's value when 2013-12-25 17:00:27 +00:00
MSP430 Make sure SP is always aligned on a 2 byte boundary 2013-10-24 09:32:31 +00:00
NVPTX [NVPTX] Fix off-by-one error when creating the VT list for an SDNode 2013-12-05 12:58:00 +00:00
PowerPC Implement initial-exec TLS for PPC32. 2013-12-20 18:08:54 +00:00
R600 R600: Allow ftrunc 2013-12-20 05:11:55 +00:00
SPARC [Sparc] Handle atomic loads/stores in sparc backend. 2014-01-01 22:11:54 +00:00
SystemZ [SystemZ] Use interlocked-access 1 instructions for CodeGen 2013-12-24 15:18:04 +00:00
Thumb Correctly handle the degenerated triple "thumb". 2013-12-18 21:29:44 +00:00
Thumb2 Enabling thumb2 mode used to force support for armv6t2. Replace this 2013-12-13 11:16:00 +00:00
X86 AVX-512: Added intrinsics for vcvt, vcvtt, vrndscale, vcmp 2014-01-01 15:12:34 +00:00
XCore XCore target: Make handling of large frames not dependent upon an FP. 2013-12-02 11:05:28 +00:00