Weiming Zhao 4fdb649f3a [aarch32] fix bug 18268: Incorrect condition of vsel ... Given vsel_cc, op1, op2, since vsel has no LE/LT, to generate vsel for such selection, it needs to inverse cc and swap op1 and op2. To inverse cc, both L/G and E bits should be flipped. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197615 91177308-0d34-0410-b5e6-96231b3b80d8		2013-12-18 22:25:17 +00:00
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AArch64	[AArch64 NEON]Implment loading vector constant form constant pool.	2013-12-18 06:26:04 +00:00
ARM	[aarch32] fix bug 18268: Incorrect condition of vsel	2013-12-18 22:25:17 +00:00
CPP	[tests] Cleanup initialization of test suffixes.	2013-08-16 00:37:11 +00:00
Generic	Fix pr18235.	2013-12-13 16:05:32 +00:00
Hexagon	Debug Info: update testing cases to specify the debug info version number.	2013-11-22 21:49:45 +00:00
Inputs	Debug Info: update testing cases to specify the debug info version number.	2013-11-22 21:49:45 +00:00
Mips	Last change for mips16 prolog/epilog cleanup and optimization.	2013-12-15 20:49:30 +00:00
MSP430	Make sure SP is always aligned on a 2 byte boundary	2013-10-24 09:32:31 +00:00
NVPTX	[NVPTX] Fix off-by-one error when creating the VT list for an SDNode	2013-12-05 12:58:00 +00:00
PowerPC	One ppc32-darwin, a i64 inside a structure can have 32 bit alignment.	2013-12-18 14:35:37 +00:00
R600	R600/SI: Minor improvements to test.	2013-12-14 00:38:04 +00:00
SPARC	[SPARCV9]: Adjust the resultant pointer of DYNAMIC_STACKALLOC with the stack BIAS on sparcV9.	2013-12-09 05:13:25 +00:00
SystemZ	Add -mcpu=z10 to SystemZ tests.	2013-12-17 05:27:16 +00:00
Thumb	Correctly handle the degenerated triple "thumb".	2013-12-18 21:29:44 +00:00
Thumb2	Enabling thumb2 mode used to force support for armv6t2. Replace this	2013-12-13 11:16:00 +00:00
X86	Disabled subregister copy coalescing during MachineCSE.	2013-12-17 19:29:36 +00:00
XCore	XCore target: Make handling of large frames not dependent upon an FP.	2013-12-02 11:05:28 +00:00