Craig Topper 68e835e9f0 [X86] Add a test case showing failure to use the RMW form of ADC when the load is in operand 1 going into isel.
The ADC instruction is commutable, but we only have RMW isel patterns with a load on the left hand side. Nothing will canonicalize loads to the LHS on these ops. So we need two patterns.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341605 91177308-0d34-0410-b5e6-96231b3b80d8
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