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https://github.com/RPCS3/llvm.git
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28042167f5
Summary: Based on a patch by David Chisnall. I've modified the original patch as follows: * Moved the expansion to the TargetStreamers so that the directive isn't expanded when emitting assembly. * Fixed an operand order bug. * Changed the move instructions from DADDu to OR to match recent changes to GAS. Reviewers: vkalintiris Subscribers: llvm-commits, emaste, seanbruno, theraven Differential Revision: http://reviews.llvm.org/D13017 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248258 91177308-0d34-0410-b5e6-96231b3b80d8
182 lines
4.5 KiB
ArmAsm
182 lines
4.5 KiB
ArmAsm
# RUN: llvm-mc -triple mips64-unknown-unknown -target-abi o32 -filetype=obj -o - %s | \
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# RUN: llvm-objdump -d -r -arch=mips64 - | \
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# RUN: FileCheck -check-prefix=ALL -check-prefix=O32 %s
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# RUN: llvm-mc -triple mips64-unknown-unknown -target-abi o32 %s | \
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# RUN: FileCheck -check-prefix=ALL -check-prefix=ASM %s
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# RUN: llvm-mc -triple mips64-unknown-unknown -target-abi n32 -filetype=obj -o - %s | \
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# RUN: llvm-objdump -d -r -t -arch=mips64 - | \
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# RUN: FileCheck -check-prefix=ALL -check-prefix=NXX -check-prefix=N32 %s
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# RUN: llvm-mc -triple mips64-unknown-unknown -target-abi n32 %s | \
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# RUN: FileCheck -check-prefix=ALL -check-prefix=ASM %s
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# RUN: llvm-mc -triple mips64-unknown-unknown %s -filetype=obj -o - | \
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# RUN: llvm-objdump -d -r -t -arch=mips64 - | \
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# RUN: FileCheck -check-prefix=ALL -check-prefix=NXX -check-prefix=N64 %s
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# RUN: llvm-mc -triple mips64-unknown-unknown %s | \
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# RUN: FileCheck -check-prefix=ALL -check-prefix=ASM %s
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.text
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.option pic2
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t1:
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.cpsetup $25, 8, __cerror
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nop
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.cpreturn
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nop
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# ALL-LABEL: t1:
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# O32-NOT: __cerror
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# FIXME: Direct object emission for N32 is still under development.
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# N32 doesn't allow 3 operations to be specified in the same relocation
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# record like N64 does.
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# NXX-NEXT: sd $gp, 8($sp)
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# NXX-NEXT: lui $gp, 0
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# NXX-NEXT: R_MIPS_GPREL16/R_MIPS_SUB/R_MIPS_HI16 __cerror
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# NXX-NEXT: addiu $gp, $gp, 0
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# NXX-NEXT: R_MIPS_GPREL16/R_MIPS_SUB/R_MIPS_LO16 __cerror
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# N32-NEXT: addu $gp, $gp, $25
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# N64-NEXT: daddu $gp, $gp, $25
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# ASM-NEXT: .cpsetup $25, 8, __cerror
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# ALL-NEXT: nop
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# ASM-NEXT: .cpreturn
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# NXX-NEXT: ld $gp, 8($sp)
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# ALL-NEXT: nop
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t2:
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.cpsetup $25, $2, __cerror
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nop
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.cpreturn
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nop
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# ALL-LABEL: t2:
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# O32-NOT: __cerror
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# FIXME: Direct object emission for N32 is still under development.
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# N32 doesn't allow 3 operations to be specified in the same relocation
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# record like N64 does.
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# NXX-NEXT: move $2, $gp
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# NXX-NEXT: lui $gp, 0
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# NXX-NEXT: R_MIPS_GPREL16/R_MIPS_SUB/R_MIPS_HI16 __cerror
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# NXX-NEXT: addiu $gp, $gp, 0
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# NXX-NEXT: R_MIPS_GPREL16/R_MIPS_SUB/R_MIPS_LO16 __cerror
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# N32-NEXT: addu $gp, $gp, $25
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# N64-NEXT: daddu $gp, $gp, $25
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# ASM-NEXT: .cpsetup $25, $2, __cerror
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# ALL-NEXT: nop
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# ASM-NEXT: .cpreturn
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# NXX-NEXT: move $gp, $2
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# ALL-NEXT: nop
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# .cpsetup with local labels (PR22518):
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# The '1:' label isn't emitted in all cases but we still want a label to match
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# so we force one here.
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t3:
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nop
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1:
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.cpsetup $25, $2, 1b
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nop
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sub $3, $3, $2
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# ALL-LABEL: t3:
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# ALL-NEXT: nop
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# O32-NEXT: nop
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# O32-NEXT: sub $3, $3, $2
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# FIXME: Direct object emission for N32 is still under development.
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# N32 doesn't allow 3 operations to be specified in the same relocation
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# record like N64 does.
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# NXX: $tmp0:
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# NXX-NEXT: move $2, $gp
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# NXX-NEXT: lui $gp, 0
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# NXX-NEXT: R_MIPS_GPREL16/R_MIPS_SUB/R_MIPS_HI16 $tmp0
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# NXX-NEXT: addiu $gp, $gp, 0
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# NXX-NEXT: R_MIPS_GPREL16/R_MIPS_SUB/R_MIPS_LO16 $tmp0
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# N32-NEXT: addu $gp, $gp, $25
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# N64-NEXT: daddu $gp, $gp, $25
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# NXX-NEXT: nop
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# NXX-NEXT: sub $3, $3, $2
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# ASM: $tmp0:
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# ASM-NEXT: .cpsetup $25, $2, $tmp0
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# Ensure we have at least one instruction between labels so that the labels
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# we're matching aren't removed.
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nop
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# ALL-NEXT: nop
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.option pic0
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t4:
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nop
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.cpsetup $25, 8, __cerror
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nop
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.cpreturn
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nop
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# Testing that .cpsetup expands to nothing in this case
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# by checking that the next instruction after the first
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# nop is also a 'nop'.
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# ALL-LABEL: t4:
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# NXX-NEXT: nop
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# NXX-NEXT: nop
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# NXX-NEXT: nop
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# ASM-NEXT: nop
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# ASM-NEXT: .cpsetup $25, 8, __cerror
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# ASM-NEXT: nop
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# ASM-NEXT: .cpreturn
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# ASM-NEXT: nop
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# Test that we accept constant expressions.
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.option pic2
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t5:
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.cpsetup $25, ((8*4) - (3*8)), __cerror
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nop
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# ALL-LABEL: t5:
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# O32-NOT: __cerror
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# FIXME: Direct object emission for N32 is still under development.
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# N32 doesn't allow 3 operations to be specified in the same relocation
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# record like N64 does.
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# NXX-NEXT: sd $gp, 8($sp)
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# NXX-NEXT: lui $gp, 0
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# NXX-NEXT: R_MIPS_GPREL16/R_MIPS_SUB/R_MIPS_HI16 __cerror
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# NXX-NEXT: addiu $gp, $gp, 0
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# NXX-NEXT: R_MIPS_GPREL16/R_MIPS_SUB/R_MIPS_LO16 __cerror
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# N32-NEXT: addu $gp, $gp, $25
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# N64-NEXT: daddu $gp, $gp, $25
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# ASM-NEXT: .cpsetup $25, 8, __cerror
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# ALL-NEXT: nop
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# NXX-LABEL: SYMBOL TABLE:
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# For .cpsetup with local labels, we need to check if $tmp0 is in the symbol
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# table:
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# NXX: .text 00000000 $tmp0
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