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775d402bf183afd46d7893bd223b3886dce9163a
llvm/test/CodeGen
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Alexander Timofeev 775d402bf1 [AMDGPU] Come back patch for the 'Assign register class for cross block values according to the divergence.' 
Detailed description:

    After https://reviews.llvm.org/D59990 submit several issues were discovered.
    Changes in common code were preserved but AMDGPU specific part was reverted to keep the backend working correctly.

    Discovered issues were addressed in the following commits:

    https://reviews.llvm.org/D67662
    https://reviews.llvm.org/D67101
    https://reviews.llvm.org/D63953
    https://reviews.llvm.org/D63731

    This change brings back AMDGPU specific changes.

  Reviewed by: rampitec, arsenm

  Differential Revision: https://reviews.llvm.org/D68635

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@374767 91177308-0d34-0410-b5e6-96231b3b80d8
2019-10-14 12:01:10 +00:00
..
AArch64
Add a pass to lower is.constant and objectsize intrinsics
2019-10-13 23:00:15 +00:00
AMDGPU
[AMDGPU] Come back patch for the 'Assign register class for cross block values according to the divergence.'
2019-10-14 12:01:10 +00:00
ARC
[lit] Delete empty lines at the end of lit.local.cfg NFC
2019-06-17 09:51:07 +00:00
ARM
Add a pass to lower is.constant and objectsize intrinsics
2019-10-13 23:00:15 +00:00
AVR
[AVR] Fix tests after r363757
2019-07-04 06:12:47 +00:00
BPF
[BPF] Remove relocation for patchable externs
2019-10-10 15:33:09 +00:00
Generic
Add a pass to lower is.constant and objectsize intrinsics
2019-10-13 23:00:15 +00:00
Hexagon
[ModuloSchedule] removeBranch() *before* creating the trip count condition
2019-10-03 17:10:32 +00:00
Inputs
[CodeGen] Add stack protector tests where the guard gets re-assigned
2019-07-17 20:46:16 +00:00
Lanai
[Alignment] Use llvm::Align in MachineFunction and TargetLowering - fixes mir parsing
2019-09-11 11:16:48 +00:00
Mips
[Mips] Fix 374055
2019-10-10 12:02:14 +00:00
MIR
Print quoted backslashes in LLVM IR as \\ instead of \5C
2019-10-10 18:31:57 +00:00
MSP430
[DAGCombiner] add operation legality checks before creating shift ops (PR43542)
2019-10-03 21:34:04 +00:00
NVPTX
[NVPTX] Fix PR41651
2019-07-30 19:52:01 +00:00
PowerPC
[AIX] Use .space instead of .zero in assembly
2019-10-11 15:07:28 +00:00
RISCV
[SelectionDAG] Add tests for LKK algorithm
2019-10-05 14:29:25 +00:00
SPARC
[test] Fix tests when run on windows after SVN r369426. NFC.
2019-08-20 20:58:02 +00:00
SystemZ
[FPEnv] Strict FP tests should use the requisite function attributes.
2019-10-04 17:03:46 +00:00
Thumb
(Re)generate various tests. NFC
2019-10-08 16:16:26 +00:00
Thumb2
[ARM] VQSUB instruction
2019-10-10 16:34:30 +00:00
WebAssembly
[WebAssembly] Make returns variadic
2019-10-09 21:42:08 +00:00
WinCFGuard
…
WinEH
[Windows] Replace TrapUnreachable with an int3 insertion pass
2019-09-09 23:04:25 +00:00
X86
[X86] Teach EmitTest to handle ISD::SSUBO/USUBO in order to use the Z flag from the subtract directly during isel.
2019-10-14 06:47:56 +00:00
XCore
[lit] Delete empty lines at the end of lit.local.cfg NFC
2019-06-17 09:51:07 +00:00