Daniil Fukalov 8fbd41bc43 [AMDGPU] Inline asm - added i16, half and i128 types support
AMDGPU inline assembler support i16, half and i128 typed variables in constraints, but they were reported as error.
Needed to fix https://github.com/RadeonOpenCompute/ROCm/issues/341,
e.g. to be able to load with global_load_dwordx4 to a 128bit integer variable

Differential Revision: https://reviews.llvm.org/D44920

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@334301 91177308-0d34-0410-b5e6-96231b3b80d8
2018-06-08 16:29:04 +00:00
2018-06-08 15:16:25 +00:00
2018-06-08 15:16:25 +00:00
2014-03-02 13:08:46 +00:00
2016-01-26 21:29:08 +00:00
2017-01-12 18:02:42 +00:00

The LLVM Compiler Infrastructure
================================

This directory and its subdirectories contain source code for LLVM,
a toolkit for the construction of highly optimized compilers,
optimizers, and runtime environments.

LLVM is open source software. You may freely distribute it under the terms of
the license agreement found in LICENSE.txt.

Please see the documentation provided in docs/ for further
assistance with LLVM, and in particular docs/GettingStarted.rst for getting
started with LLVM and docs/README.txt for an overview of LLVM's
documentation setup.

If you are writing a package for LLVM, see docs/Packaging.rst for our
suggestions.


S
Description
Old fork of llvm-mirror, used on older RPCS3 builds
Readme 859 MiB
Latest
2019-04-21 15:35:31 -04:00
Languages
LLVM 52.9%
C++ 32.7%
Assembly 13.2%
Python 0.4%
C 0.4%
Other 0.3%