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llvm/lib/Target/XCore
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Bill Wendling e488b4ecdc Don't cache the instruction and register info from the TargetMachine, because 
the internals of TargetMachine could change.

No functionality change intended.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183572 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-07 21:04:35 +00:00
..
Disassembler
Remove the Copied parameter from MemoryObject::readBytes.
2013-05-24 10:54:58 +00:00
InstPrinter
[XCore] Make use of the target independent global address offset folding.
2013-05-04 17:24:33 +00:00
MCTargetDesc
Remove the MachineMove class.
2013-05-13 01:16:13 +00:00
TargetInfo
Move all of the header files which are involved in modelling the LLVM IR
2013-01-02 11:36:10 +00:00
CMakeLists.txt
[XCore] Move lowering of thread local storage to a separate pass.
2013-05-04 17:01:55 +00:00
LLVMBuild.txt
Add XCore disassembler.
2012-12-16 17:29:14 +00:00
Makefile
Add instruction encodings and disassembly for 1r instructions.
2012-12-16 17:37:34 +00:00
README.txt
The backend now makes a reasonable job of targeting lmul / macc
2010-03-10 18:14:47 +00:00
XCore.h
[XCore] Move lowering of thread local storage to a separate pass.
2013-05-04 17:01:55 +00:00
XCore.td
Change XCoreAsmPrinter to lower MachineInstrs to MCInsts before emission.
2012-12-16 16:20:48 +00:00
XCoreAsmPrinter.cpp
[XCore] Move lowering of thread local storage to a separate pass.
2013-05-04 17:01:55 +00:00
XCoreCallingConv.td
Add support for trampolines on the XCore.
2011-02-02 14:57:41 +00:00
XCoreFrameLowering.cpp
Removed unused variable, detected by gcc
2013-05-16 08:37:22 +00:00
XCoreFrameLowering.h
Move the eliminateCallFramePseudoInstr method from TargetRegisterInfo
2013-02-21 20:05:00 +00:00
XCoreInstrFormats.td
[XCore] Add missing 2r instructions.
2013-02-17 22:38:05 +00:00
XCoreInstrInfo.cpp
Don't cache the instruction and register info from the TargetMachine, because
2013-06-07 21:04:35 +00:00
XCoreInstrInfo.h
Reorder includes in Target backends to following coding standards. Remove some superfluous forward declarations.
2012-03-17 18:46:09 +00:00
XCoreInstrInfo.td
Replace Count{Leading,Trailing}Zeros_{32,64} with count{Leading,Trailing}Zeros.
2013-05-24 22:23:49 +00:00
XCoreISelDAGToDAG.cpp
Cache the TargetLowering info object as a pointer.
2013-06-06 00:43:09 +00:00
XCoreISelLowering.cpp
Order CALLSEQ_START and CALLSEQ_END nodes.
2013-05-29 22:03:55 +00:00
XCoreISelLowering.h
Track IR ordering of SelectionDAG nodes 2/4.
2013-05-25 02:42:55 +00:00
XCoreLowerThreadLocal.cpp
[XCore] Move lowering of thread local storage to a separate pass.
2013-05-04 17:01:55 +00:00
XCoreMachineFunctionInfo.cpp
Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.
2012-02-18 12:03:15 +00:00
XCoreMachineFunctionInfo.h
Sort includes for all of the .h files under the 'lib' tree. These were
2012-12-04 07:12:27 +00:00
XCoreMCInstLower.cpp
Update comments to match recommended doxygen style.
2012-12-17 12:13:41 +00:00
XCoreMCInstLower.h
Update comments to match recommended doxygen style.
2012-12-17 12:13:41 +00:00
XCoreRegisterInfo.cpp
Don't cache the instruction and register info from the TargetMachine, because
2013-06-07 21:04:35 +00:00
XCoreRegisterInfo.h
Don't cache the instruction and register info from the TargetMachine, because
2013-06-07 21:04:35 +00:00
XCoreRegisterInfo.td
[XCore] The RRegs register class is a superset of GRRegs.
2013-04-04 19:57:46 +00:00
XCoreSelectionDAGInfo.cpp
Implement a bunch more TargetSelectionDAGInfo infrastructure.
2010-05-11 17:31:57 +00:00
XCoreSelectionDAGInfo.h
Implement a bunch more TargetSelectionDAGInfo infrastructure.
2010-05-11 17:31:57 +00:00
XCoreSubtarget.cpp
Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.
2012-02-18 12:03:15 +00:00
XCoreSubtarget.h
Sort includes for all of the .h files under the 'lib' tree. These were
2012-12-04 07:12:27 +00:00
XCoreTargetMachine.cpp
Remove the MachineMove class.
2013-05-13 01:16:13 +00:00
XCoreTargetMachine.h
Switch TargetTransformInfo from an immutable analysis pass that requires
2013-01-07 01:37:14 +00:00
XCoreTargetObjectFile.cpp
[XCore] Use static relocation model by default.
2013-05-04 16:40:58 +00:00
XCoreTargetObjectFile.h
Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.
2012-02-18 12:03:15 +00:00

README.txt 

To-do
-----

* Instruction encodings
* Tailcalls
* Investigate loop alignment
* Add builtins