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https://github.com/RPCS3/llvm.git
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c8c80b0f2f
The machine scheduler currently biases register copies to/from physical registers to be closer to their point of use / def to minimize their live ranges. This change extends this to also physical register assignments from immediate values. This causes a reduction in reduction in overall register pressure and minor reduction in spills and indirectly fixes an out-of-registers assertion (PR39391). Most test changes are from minor instruction reorderings and register name selection changes and direct consequences of that. Reviewers: MatzeB, qcolombet, myatsina, pcc Subscribers: nemanjai, jvesely, nhaehnle, eraman, hiraditya, javed.absar, arphaman, jfb, jsji, llvm-commits Differential Revision: https://reviews.llvm.org/D54218 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346894 91177308-0d34-0410-b5e6-96231b3b80d8
291 lines
7.8 KiB
LLVM
291 lines
7.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X32
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; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
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define void @si64(i64 %x, i64 %y, i64* %p, i64* %q) nounwind {
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; X32-LABEL: si64:
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; X32: # %bb.0:
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; X32-NEXT: pushl %ebp
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; X32-NEXT: pushl %ebx
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; X32-NEXT: pushl %edi
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; X32-NEXT: pushl %esi
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ebx
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ebp
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; X32-NEXT: pushl %ebp
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; X32-NEXT: pushl %ebx
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; X32-NEXT: pushl {{[0-9]+}}(%esp)
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; X32-NEXT: pushl {{[0-9]+}}(%esp)
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; X32-NEXT: calll __divdi3
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; X32-NEXT: addl $16, %esp
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; X32-NEXT: movl %eax, %esi
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; X32-NEXT: movl %edx, %edi
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; X32-NEXT: pushl %ebp
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; X32-NEXT: pushl %ebx
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; X32-NEXT: pushl {{[0-9]+}}(%esp)
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; X32-NEXT: pushl {{[0-9]+}}(%esp)
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; X32-NEXT: calll __moddi3
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; X32-NEXT: addl $16, %esp
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X32-NEXT: movl %edi, 4(%ecx)
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; X32-NEXT: movl %esi, (%ecx)
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X32-NEXT: movl %edx, 4(%ecx)
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; X32-NEXT: movl %eax, (%ecx)
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; X32-NEXT: popl %esi
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; X32-NEXT: popl %edi
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; X32-NEXT: popl %ebx
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; X32-NEXT: popl %ebp
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; X32-NEXT: retl
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;
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; X64-LABEL: si64:
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; X64: # %bb.0:
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; X64-NEXT: movq %rdx, %r8
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; X64-NEXT: movq %rdi, %rax
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; X64-NEXT: cqto
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; X64-NEXT: idivq %rsi
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; X64-NEXT: movq %rax, (%r8)
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; X64-NEXT: movq %rdx, (%rcx)
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; X64-NEXT: retq
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%r = sdiv i64 %x, %y
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%t = srem i64 %x, %y
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store i64 %r, i64* %p
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store i64 %t, i64* %q
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ret void
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}
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define void @si32(i32 %x, i32 %y, i32* %p, i32* %q) nounwind {
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; X32-LABEL: si32:
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; X32: # %bb.0:
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; X32-NEXT: pushl %esi
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: cltd
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; X32-NEXT: idivl {{[0-9]+}}(%esp)
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
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; X32-NEXT: movl %eax, (%esi)
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; X32-NEXT: movl %edx, (%ecx)
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; X32-NEXT: popl %esi
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; X32-NEXT: retl
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;
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; X64-LABEL: si32:
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; X64: # %bb.0:
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; X64-NEXT: movq %rdx, %r8
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: cltd
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; X64-NEXT: idivl %esi
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; X64-NEXT: movl %eax, (%r8)
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; X64-NEXT: movl %edx, (%rcx)
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; X64-NEXT: retq
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%r = sdiv i32 %x, %y
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%t = srem i32 %x, %y
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store i32 %r, i32* %p
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store i32 %t, i32* %q
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ret void
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}
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define void @si16(i16 %x, i16 %y, i16* %p, i16* %q) nounwind {
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; X32-LABEL: si16:
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; X32: # %bb.0:
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; X32-NEXT: pushl %esi
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; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: cwtd
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; X32-NEXT: idivw {{[0-9]+}}(%esp)
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
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; X32-NEXT: movw %ax, (%esi)
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; X32-NEXT: movw %dx, (%ecx)
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; X32-NEXT: popl %esi
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; X32-NEXT: retl
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;
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; X64-LABEL: si16:
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; X64: # %bb.0:
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; X64-NEXT: movq %rdx, %r8
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: # kill: def $ax killed $ax killed $eax
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; X64-NEXT: cwtd
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; X64-NEXT: idivw %si
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; X64-NEXT: movw %ax, (%r8)
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; X64-NEXT: movw %dx, (%rcx)
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; X64-NEXT: retq
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%r = sdiv i16 %x, %y
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%t = srem i16 %x, %y
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store i16 %r, i16* %p
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store i16 %t, i16* %q
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ret void
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}
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define void @si8(i8 %x, i8 %y, i8* %p, i8* %q) nounwind {
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; X32-LABEL: si8:
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; X32: # %bb.0:
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; X32-NEXT: pushl %ebx
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; X32-NEXT: movb {{[0-9]+}}(%esp), %al
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; X32-NEXT: cbtw
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; X32-NEXT: idivb {{[0-9]+}}(%esp)
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X32-NEXT: movsbl %ah, %ebx
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; X32-NEXT: movb %al, (%edx)
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; X32-NEXT: movb %bl, (%ecx)
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; X32-NEXT: popl %ebx
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; X32-NEXT: retl
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;
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; X64-LABEL: si8:
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; X64: # %bb.0:
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: # kill: def $al killed $al killed $eax
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; X64-NEXT: cbtw
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; X64-NEXT: idivb %sil
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; X64-NEXT: movsbl %ah, %esi
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; X64-NEXT: movb %al, (%rdx)
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; X64-NEXT: movb %sil, (%rcx)
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; X64-NEXT: retq
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%r = sdiv i8 %x, %y
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%t = srem i8 %x, %y
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store i8 %r, i8* %p
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store i8 %t, i8* %q
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ret void
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}
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define void @ui64(i64 %x, i64 %y, i64* %p, i64* %q) nounwind {
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; X32-LABEL: ui64:
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; X32: # %bb.0:
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; X32-NEXT: pushl %ebp
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; X32-NEXT: pushl %ebx
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; X32-NEXT: pushl %edi
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; X32-NEXT: pushl %esi
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ebx
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ebp
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; X32-NEXT: pushl %ebp
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; X32-NEXT: pushl %ebx
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; X32-NEXT: pushl {{[0-9]+}}(%esp)
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; X32-NEXT: pushl {{[0-9]+}}(%esp)
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; X32-NEXT: calll __udivdi3
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; X32-NEXT: addl $16, %esp
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; X32-NEXT: movl %eax, %esi
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; X32-NEXT: movl %edx, %edi
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; X32-NEXT: pushl %ebp
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; X32-NEXT: pushl %ebx
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; X32-NEXT: pushl {{[0-9]+}}(%esp)
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; X32-NEXT: pushl {{[0-9]+}}(%esp)
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; X32-NEXT: calll __umoddi3
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; X32-NEXT: addl $16, %esp
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X32-NEXT: movl %edi, 4(%ecx)
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; X32-NEXT: movl %esi, (%ecx)
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X32-NEXT: movl %edx, 4(%ecx)
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; X32-NEXT: movl %eax, (%ecx)
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; X32-NEXT: popl %esi
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; X32-NEXT: popl %edi
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; X32-NEXT: popl %ebx
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; X32-NEXT: popl %ebp
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; X32-NEXT: retl
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;
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; X64-LABEL: ui64:
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; X64: # %bb.0:
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; X64-NEXT: movq %rdx, %r8
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; X64-NEXT: movq %rdi, %rax
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; X64-NEXT: xorl %edx, %edx
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; X64-NEXT: divq %rsi
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; X64-NEXT: movq %rax, (%r8)
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; X64-NEXT: movq %rdx, (%rcx)
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; X64-NEXT: retq
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%r = udiv i64 %x, %y
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%t = urem i64 %x, %y
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store i64 %r, i64* %p
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store i64 %t, i64* %q
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ret void
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}
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define void @ui32(i32 %x, i32 %y, i32* %p, i32* %q) nounwind {
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; X32-LABEL: ui32:
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; X32: # %bb.0:
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; X32-NEXT: pushl %esi
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: xorl %edx, %edx
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; X32-NEXT: divl {{[0-9]+}}(%esp)
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
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; X32-NEXT: movl %eax, (%esi)
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; X32-NEXT: movl %edx, (%ecx)
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; X32-NEXT: popl %esi
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; X32-NEXT: retl
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;
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; X64-LABEL: ui32:
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; X64: # %bb.0:
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; X64-NEXT: movq %rdx, %r8
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: xorl %edx, %edx
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; X64-NEXT: divl %esi
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; X64-NEXT: movl %eax, (%r8)
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; X64-NEXT: movl %edx, (%rcx)
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; X64-NEXT: retq
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%r = udiv i32 %x, %y
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%t = urem i32 %x, %y
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store i32 %r, i32* %p
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store i32 %t, i32* %q
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ret void
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}
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define void @ui16(i16 %x, i16 %y, i16* %p, i16* %q) nounwind {
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; X32-LABEL: ui16:
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; X32: # %bb.0:
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; X32-NEXT: pushl %esi
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; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: xorl %edx, %edx
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; X32-NEXT: divw {{[0-9]+}}(%esp)
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
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; X32-NEXT: movw %ax, (%esi)
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; X32-NEXT: movw %dx, (%ecx)
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; X32-NEXT: popl %esi
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; X32-NEXT: retl
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;
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; X64-LABEL: ui16:
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; X64: # %bb.0:
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; X64-NEXT: movq %rdx, %r8
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: # kill: def $ax killed $ax killed $eax
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; X64-NEXT: xorl %edx, %edx
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; X64-NEXT: divw %si
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; X64-NEXT: movw %ax, (%r8)
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; X64-NEXT: movw %dx, (%rcx)
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; X64-NEXT: retq
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%r = udiv i16 %x, %y
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%t = urem i16 %x, %y
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store i16 %r, i16* %p
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store i16 %t, i16* %q
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ret void
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}
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define void @ui8(i8 %x, i8 %y, i8* %p, i8* %q) nounwind {
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; X32-LABEL: ui8:
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; X32: # %bb.0:
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; X32-NEXT: pushl %ebx
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; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: # kill: def $eax killed $eax def $ax
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; X32-NEXT: divb {{[0-9]+}}(%esp)
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; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X32-NEXT: movzbl %ah, %ebx
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; X32-NEXT: movb %al, (%edx)
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; X32-NEXT: movb %bl, (%ecx)
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; X32-NEXT: popl %ebx
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; X32-NEXT: retl
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;
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; X64-LABEL: ui8:
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; X64: # %bb.0:
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; X64-NEXT: movzbl %dil, %eax
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; X64-NEXT: # kill: def $eax killed $eax def $ax
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; X64-NEXT: divb %sil
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; X64-NEXT: movzbl %ah, %esi
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; X64-NEXT: movb %al, (%rdx)
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; X64-NEXT: movb %sil, (%rcx)
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; X64-NEXT: retq
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%r = udiv i8 %x, %y
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%t = urem i8 %x, %y
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store i8 %r, i8* %p
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store i8 %t, i8* %q
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ret void
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}
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