Simon Pilgrim d00ce88b4b [X86][AVX] truncateVectorWithPACK - avoid bitcasted shuffles ... truncateVectorWithPACK is often used in conjunction with ComputeNumSignBits which struggles when peeking through bitcasts. This fix tries to avoid bitcast(shuffle(bitcast())) patterns in the 256-bit 64-bit sublane shuffles so we can still see through at least until lowering when the shuffles will need to be bitcasted to widen the shuffle type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@364401 91177308-0d34-0410-b5e6-96231b3b80d8		2019-06-26 09:50:11 +00:00
..
avx512-shuffles	[SelectionDAG] Fold insert_subvector(undef, extract_subvector(v, c), c) -> v in getNode	2019-06-17 10:14:52 +00:00
GC	[lit] Delete empty lines at the end of lit.local.cfg NFC	2019-06-17 09:51:07 +00:00
GlobalISel	[AArch64][GlobalISel] Make s8 and s16 G_CONSTANTs legal.	2019-06-21 16:43:50 +00:00
3addr-16bit.ll
3addr-or.ll
3dnow-intrinsics.ll
4char-promote.ll
8bit_cmov_of_trunc_promotion.ll
2003-08-03-CallArgLiveRanges.ll
2003-08-23-DeadBlockTest.ll
2003-11-03-GlobalBool.ll
2004-02-13-FrameReturnAddress.ll
2004-02-14-InefficientStackPointer.ll
2004-02-22-Casts.ll
2004-03-30-Select-Max.ll
2004-04-13-FPCMOV-Crash.ll
2004-06-10-StackifierCrash.ll
2004-10-08-SelectSetCCFold.ll
2005-01-17-CycleInDAG.ll
2005-02-14-IllegalAssembler.ll
2005-05-08-FPStackifierPHI.ll
2006-01-19-ISelFoldingBug.ll
2006-03-01-InstrSchedBug.ll
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2006-05-01-SchedCausingSpills.ll
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2006-05-11-InstrSched.ll
2006-05-17-VectorArg.ll
2006-05-22-FPSetEQ.ll
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2006-07-10-InlineAsmAConstraint.ll
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2006-07-28-AsmPrint-Long-As-Pointer.ll
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2006-10-09-CycleInDAG.ll
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2006-10-12-CycleInDAG.ll
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2006-10-19-SwitchUnnecessaryBranching.ll
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2006-11-17-IllegalMove.ll
2006-11-27-SelectLegalize.ll
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2007-01-08-InstrSched.ll
2007-01-08-X86-64-Pointer.ll
2007-01-13-StackPtrIndex.ll
2007-01-29-InlineAsm-ir.ll
2007-02-04-OrAddrMode.ll
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2007-02-19-LiveIntervalAssert.ll
2007-02-23-DAGCombine-Miscompile.ll
2007-02-25-FastCCStack.ll
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2007-03-15-GEP-Idx-Sink.ll
2007-03-16-InlineAsm.ll
2007-03-18-LiveIntervalAssert.ll
2007-03-24-InlineAsmMultiRegConstraint.ll
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2007-03-24-InlineAsmXConstraint.ll
2007-03-26-CoalescerBug.ll
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2007-04-11-InlineAsmVectorResult.ll
2007-04-17-LiveIntervalAssert.ll
2007-04-24-Huge-Stack.ll
2007-04-24-VectorCrash.ll
2007-04-27-InlineAsm-IntMemInput.ll
2007-05-05-Personality.ll
2007-05-05-VecCastExpand.ll
2007-05-14-LiveIntervalAssert.ll
2007-05-15-maskmovq.ll
2007-05-17-ShuffleISelBug.ll
2007-06-04-X86-64-CtorAsmBugs.ll
2007-06-28-X86-64-isel.ll
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2007-06-29-VecFPConstantCSEBug.ll
2007-07-03-GR64ToVR64.ll
2007-07-10-StackerAssert.ll
2007-07-18-Vector-Extract.ll
2007-08-01-LiveVariablesBug.ll
2007-08-09-IllegalX86-64Asm.ll
2007-08-10-SignExtSubreg.ll
2007-09-05-InvalidAsm.ll
2007-09-06-ExtWeakAliasee.ll
2007-09-27-LDIntrinsics.ll
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2007-11-03-x86-64-q-constraint.ll
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2008-04-24-MemCpyBug.ll
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2008-04-28-CoalescerBug.ll
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2008-05-12-tailmerge-5.ll
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2008-05-28-CoalescerBug.ll
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2008-06-13-NotVolatileLoadStore.ll
2008-06-13-VolatileLoadStore.ll
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2008-08-23-64Bit-maskmovq.ll
2008-08-31-EH_RETURN32.ll
2008-08-31-EH_RETURN64.ll
2008-09-05-sinttofp-2xi32.ll
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2008-09-11-CoalescerBug.ll
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2009-07-07-SplitICmp.ll
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2009-07-16-CoalescerBug.ll
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2009-12-11-TLSNoRedZone.ll
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2010-01-19-OptExtBug.ll
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2010-05-25-DotDebugLoc.ll
2010-05-26-DotDebugLoc.ll
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2010-06-28-FastAllocTiedOperand.ll
2010-06-28-matched-g-constraint.ll
2010-07-02-asm-alignstack.ll
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2010-07-06-DbgCrash.ll
2010-07-11-FPStackLoneUse.ll
2010-07-13-indirectXconstraint.ll
2010-07-15-Crash.ll
2010-07-29-SetccSimplify.ll
2010-08-04-MaskedSignedCompare.ll	[FIX] Forces shrink wrapping to consider any memory access as aliasing with the stack	2019-06-13 13:56:19 +00:00
2010-08-04-MingWCrash.ll
2010-08-04-StackVariable.ll
2010-09-01-RemoveCopyByCommutingDef.ll
2010-09-16-asmcrash.ll
2010-09-16-EmptyFilename.ll
2010-09-17-SideEffectsInChain.ll
2010-09-30-CMOV-JumpTable-PHI.ll
2010-10-08-cmpxchg8b.ll
2010-11-02-DbgParameter.ll
2010-11-09-MOVLPS.ll
2010-11-18-SelectOfExtload.ll
2011-01-07-LegalizeTypesCrash.ll
2011-01-10-DagCombineHang.ll
2011-01-24-DbgValue-Before-Use.ll
2011-02-04-FastRegallocNoFP.ll
2011-02-12-shuffle.ll
2011-02-21-VirtRegRewriter-KillSubReg.ll
2011-02-23-UnfoldBug.ll
2011-02-27-Fpextend.ll
2011-03-02-DAGCombiner.ll
2011-03-08-Sched-crash.ll
2011-03-09-Physreg-Coalescing.ll
2011-03-30-CreateFixedObjCrash.ll
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2011-04-19-sclr-bb.ll
2011-05-09-loaduse.ll
2011-05-26-UnreachableBlockElim.ll
2011-05-27-CrossClassCoalescing.ll
2011-06-01-fildll.ll
2011-06-03-x87chain.ll
2011-06-06-fgetsign80bit.ll
2011-06-12-FastAllocSpill.ll
2011-06-14-mmx-inlineasm.ll
2011-06-14-PreschedRegalias.ll
2011-06-19-QuicksortCoalescerBug.ll
2011-07-13-BadFrameIndexDisplacement.ll
2011-08-23-PerformSubCombine128.ll
2011-08-23-Trampoline.ll
2011-08-29-BlockConstant.ll
2011-08-29-InitOrder.ll
2011-09-14-valcoalesce.ll
2011-09-18-sse2cmp.ll
2011-09-21-setcc-bug.ll
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2011-10-11-srl.ll
2011-10-12-MachineCSE.ll
2011-10-18-FastISel-VectorParams.ll
2011-10-19-LegelizeLoad.ll
2011-10-19-widen_vselect.ll
2011-10-21-widen-cmp.ll
2011-10-27-tstore.ll
2011-10-30-padd.ll
2011-11-07-LegalizeBuildVector.ll
2011-11-22-AVX2-Domains.ll
2011-11-30-or.ll
2011-12-8-bitcastintprom.ll
2011-12-06-AVXVectorExtractCombine.ll
2011-12-06-BitcastVectorGlobal.ll
2011-12-08-AVXISelBugs.ll
2011-12-15-vec_shift.ll
2011-12-26-extractelement-duplicate-load.ll
2011-12-28-vselecti8.ll
2011-20-21-zext-ui2fp.ll
2012-1-10-buildvector.ll
2012-01-10-UndefExceptionEdge.ll
2012-01-11-split-cv.ll
2012-01-12-extract-sv.ll
2012-01-16-mfence-nosse-flags.ll
2012-01-18-vbitcast.ll
2012-02-12-dagco.ll
2012-02-14-scalar.ll
2012-02-23-mmx-inlineasm.ll
2012-02-29-CoalescerBug.ll
2012-03-15-build_vector_wl.ll
2012-03-20-LargeConstantExpr.ll
2012-03-26-PostRALICMBug.ll
2012-04-09-TwoAddrPassBug.ll
2012-04-26-sdglue.ll
2012-05-17-TwoAddressBug.ll
2012-05-19-CoalescerCrash.ll
2012-07-10-extload64.ll
2012-07-10-shufnorm.ll
2012-07-15-broadcastfold.ll
2012-07-15-BuildVectorPromote.ll
2012-07-15-tconst_shl.ll
2012-07-15-vshl.ll
2012-07-16-fp2ui-i1.ll
2012-07-16-LeaUndef.ll
2012-07-17-vtrunc.ll
2012-07-23-select_cc.ll
2012-08-07-CmpISelBug.ll	[X86] Regenerate CmpISel test for future patch	2019-06-11 15:13:11 +00:00
2012-08-16-setcc.ll
2012-08-17-legalizer-crash.ll
2012-08-28-UnsafeMathCrash.ll
2012-09-13-dagco-fneg.ll
2012-09-28-CGPBug.ll
2012-10-02-DAGCycle.ll
2012-10-03-DAGCycle.ll
2012-10-18-crash-dagco.ll
2012-11-28-merge-store-alias.ll
2012-12-1-merge-multiple.ll
2012-12-12-DAGCombineCrash.ll
2012-12-14-v8fp80-crash.ll
2012-12-19-NoImplicitFloat.ll
2013-01-09-DAGCombineBug.ll
2013-03-13-VEX-DestReg.ll
2013-05-06-ConactVectorCrash.ll
2013-10-14-FastISel-incorrect-vreg.ll
2014-05-29-factorial.ll
2014-08-29-CompactUnwind.ll
9601.ll
20090313-signext.ll
abi-isel.ll
absolute-bit-mask-fastisel.ll
absolute-bit-mask.ll
absolute-bt.ll
absolute-cmp.ll
absolute-constant.ll
absolute-rotate.ll
add32ri8.ll
add_shl_constant.ll
add-ext.ll
add-i64.ll
add-of-carry.ll
add-sub-nsw-nuw.ll
add.ll
addcarry2.ll
addcarry.ll
addr-label-difference.ll
addr-mode-matcher-2.ll	[Peephole] Allow folding loads into instructions w/multiple uses (such as test64rr)	2019-06-25 17:29:18 +00:00
addr-mode-matcher.ll
addr-of-ret-addr.ll
address-type-promotion-constantexpr.ll
addrsig.ll
addsub-constant-folding.ll	[NFC][Codegen] Add/sub constant-folding: add scalar tests too	2019-05-31 08:23:48 +00:00
adx-commute.mir
adx-intrinsics-upgrade.ll
adx-intrinsics.ll
aes_intrinsics.ll
alias-gep.ll
alias-static-alloca.ll
aliases.ll
aligned-comm.ll
aligned-variadic.ll
alignment-2.ll
alignment.ll
all-ones-vector.ll
alldiv-divdi3.ll
alloca-align-rounding-32.ll
alloca-align-rounding.ll
allrem-moddi3.ll
and-encoding.ll
and-load-fold.ll
and-or-fold.ll
and-sink.ll
and-su.ll
andimm8.ll
anyext.ll
anyregcc-crash.ll
anyregcc.ll
apm.ll
AppendingLinkage.ll
arg_returned_bitcast.ll	[SelectionDAG][FIX] Allow "returned" arguments to be bit-casted	2019-06-04 20:34:43 +00:00
arg-cast.ll
arg-copy-elide-win64.ll
arg-copy-elide.ll
asm-block-labels.ll
asm-global-imm.ll
asm-indirect-mem.ll
asm-invalid-register-class-crasher.ll
asm-label2.ll
asm-label.ll
asm-mismatched-types.ll
asm-modifier-P.ll
asm-modifier.ll
asm-reg-type-mismatch-avx512.ll
asm-reg-type-mismatch.ll
asm-reject-reg-type-mismatch.ll
asm-reject-rex.ll
asm-reject-vk32-vk64.ll
asm-reject-xmm16.ll
atom-call-reg-indirect-foldedreload32.ll
atom-call-reg-indirect-foldedreload64.ll
atom-call-reg-indirect.ll
atom-cmpb.ll
atom-fixup-lea1.ll
atom-fixup-lea2.ll
atom-fixup-lea3.ll
atom-fixup-lea4.ll
atom-lea-addw-bug.ll
atom-lea-sp.ll
atom-pad-short-functions.ll
atom-sched.ll
atom-shuf.ll
atomic8.ll
atomic16.ll
atomic32.ll
atomic64.ll
atomic128.ll
atomic6432.ll
atomic-add.ll
atomic-dagsched.ll
atomic-eflags-reuse.ll
atomic-flags.ll
atomic-fp.ll
atomic-idempotent.ll
atomic-load-store-wide.ll
atomic-load-store.ll
atomic-mi.ll
atomic-minmax-i6432.ll
atomic-monotonic.ll
atomic-non-integer.ll
atomic-op.ll
atomic-ops-ancient-64.ll
atomic-or.ll
atomic-pointer.ll
atomic-unordered.ll	[FastISel] Skip creating unnecessary vregs for arguments	2019-06-10 16:53:37 +00:00
atomicf128.ll
Atomics-64.ll
attribute-sections.ll
avg-mask.ll
avg.ll	[x86] split 256-bit store of concatenated vectors	2019-06-04 16:40:04 +00:00
avoid_complex_am.ll
avoid-lea-scale2.ll
avoid-loop-align-2.ll
avoid-loop-align.ll
avoid-sfb-g-no-change.mir
avoid-sfb-kill-flags.mir
avoid-sfb-offset.mir	Describe stack-id as an enum	2019-06-17 09:13:29 +00:00
avoid-sfb-overlaps.ll
avoid-sfb.ll
avx1-logical-load-folding.ll
avx2-arith.ll
avx2-cmp.ll
avx2-conversions.ll
avx2-fma-fneg-combine.ll
avx2-gather.ll
avx2-intrinsics-canonical.ll
avx2-intrinsics-fast-isel.ll
avx2-intrinsics-x86-upgrade.ll
avx2-intrinsics-x86.ll
avx2-logic.ll
avx2-masked-gather.ll	[MIR] Add simple PRE pass to MachineCSE	2019-06-09 12:15:47 +00:00
avx2-nontemporal.ll
avx2-phaddsub.ll
avx2-pmovxrm.ll
avx2-shift.ll
avx2-vbroadcast.ll
avx2-vbroadcasti128.ll
avx2-vector-shifts.ll
avx2-vperm.ll
avx512-adc-sbb.ll
avx512-any_extend_load.ll
avx512-arith.ll
avx512-bugfix-23634.ll
avx512-bugfix-25270.ll
avx512-bugfix-26264.ll
avx512-build-vector.ll
avx512-calling-conv.ll
avx512-cmp-kor-sequence.ll
avx512-cmp.ll
avx512-cvt-widen.ll	[SelectionDAG] Add [us]itofp(undef) --> 0 constant fold (PR39205)	2019-06-03 13:02:07 +00:00
avx512-cvt.ll	[X86] Fix the pattern for merge masked vcvtps2pd.	2019-06-03 19:29:14 +00:00
avx512-cvttp2i.ll
avx512-ext.ll	[TargetLowering] SimplifyDemandedBits - legal checks for SIGN/ZERO_EXTEND -> ZERO/ANY_EXTEND	2019-06-25 10:51:15 +00:00
avx512-extract-subvector-load-store.ll
avx512-extract-subvector.ll
avx512-fma-commute.ll
avx512-fma-intrinsics-upgrade.ll
avx512-fma-intrinsics.ll
avx512-fma.ll	[TargetLowering] SimplifyDemandedBits - legal checks for SIGN/ZERO_EXTEND -> ZERO/ANY_EXTEND	2019-06-25 10:51:15 +00:00
avx512-fsel.ll
avx512-gather-scatter-intrin-deprecated.ll
avx512-gather-scatter-intrin.ll
avx512-gfni-intrinsics.ll
avx512-hadd-hsub.ll
avx512-i1test.ll
avx512-inc-dec.ll
avx512-insert-extract_i1.ll
avx512-insert-extract.ll	Teach the DAGCombine to fold this pattern(c1 and c2 is constant).	2019-06-26 05:12:53 +00:00
avx512-intel-ocl.ll
avx512-intrinsics-canonical.ll
avx512-intrinsics-fast-isel.ll	[X86] Cleanups and safety checks around the isFNEG	2019-06-24 17:28:26 +00:00
avx512-intrinsics-upgrade.ll	[DAGCombiner] Replace masked loads with a zero mask with the passthru value	2019-06-02 18:58:46 +00:00
avx512-intrinsics-x86_64.ll
avx512-intrinsics.ll
avx512-load-store.ll
avx512-load-trunc-store-i1.ll
avx512-logic.ll
avx512-mask-op.ll	[TargetLowering] SimplifyDemandedBits - legal checks for SIGN/ZERO_EXTEND -> ZERO/ANY_EXTEND	2019-06-25 10:51:15 +00:00
avx512-mask-spills.ll
avx512-mask-zext-bugfix.ll
avx512-masked_memop-16-8.ll
avx512-masked-memop-64-32.ll	[TargetLowering] SimplifyDemandedBits - legal checks for SIGN/ZERO_EXTEND -> ZERO/ANY_EXTEND	2019-06-25 10:51:15 +00:00
avx512-memfold.ll
avx512-mov.ll
avx512-nontemporal.ll
avx512-pmovxrm.ll
avx512-regcall-Mask.ll
avx512-regcall-NoMask.ll
avx512-rndscale.ll
avx512-rotate.ll
avx512-scalar_mask.ll
avx512-scalar.ll
avx512-scalarIntrinsics.ll
avx512-select.ll	[X86] Don't mark v64i8/v32i16 ISD::SELECT as custom unless they are legal types.	2019-06-21 18:50:00 +00:00
avx512-shift.ll
avx512-skx-insert-subvec.ll
avx512-trunc-widen.ll	[x86] split 256-bit store of concatenated vectors	2019-06-04 16:40:04 +00:00
avx512-trunc.ll	[x86] split 256-bit store of concatenated vectors	2019-06-04 16:40:04 +00:00
avx512-unsafe-fp-math.ll
avx512-vbroadcast.ll
avx512-vbroadcasti128.ll
avx512-vbroadcasti256.ll
avx512-vec3-crash.ll
avx512-vec-cmp.ll	[TargetLowering] SimplifyDemandedBits - legal checks for SIGN/ZERO_EXTEND -> ZERO/ANY_EXTEND	2019-06-25 10:51:15 +00:00
avx512-vpclmulqdq.ll
avx512-vpermv3-commute.ll
avx512-vpternlog-commute.ll
avx512-vselect-crash.ll
avx512-vselect.ll
avx512bf16-intrinsics.ll
avx512bf16-vl-intrinsics.ll
avx512bw-arith.ll
avx512bw-intrinsics-canonical.ll
avx512bw-intrinsics-fast-isel.ll
avx512bw-intrinsics-upgrade.ll
avx512bw-intrinsics.ll
avx512bw-mask-op.ll
avx512bw-mov.ll
avx512bw-vec-cmp.ll
avx512bw-vec-test-testn.ll
avx512bwvl-arith.ll
avx512bwvl-intrinsics-canonical.ll
avx512bwvl-intrinsics-fast-isel.ll
avx512bwvl-intrinsics-upgrade.ll
avx512bwvl-intrinsics.ll
avx512bwvl-mov.ll
avx512bwvl-vec-cmp.ll
avx512bwvl-vec-test-testn.ll
avx512cd-intrinsics-fast-isel.ll
avx512cd-intrinsics-upgrade.ll
avx512cd-intrinsics.ll
avx512cdvl-intrinsics-upgrade.ll
avx512cdvl-intrinsics.ll
avx512dq-intrinsics-fast-isel.ll
avx512dq-intrinsics-upgrade.ll
avx512dq-intrinsics.ll
avx512dq-mask-op.ll
avx512dqvl-intrinsics-fast-isel.ll
avx512dqvl-intrinsics-upgrade.ll
avx512dqvl-intrinsics.ll
avx512er-intrinsics.ll
avx512f-256-set0.mir
avx512f-vec-test-testn.ll
avx512ifma-intrinsics-fast-isel.ll
avx512ifma-intrinsics-upgrade.ll
avx512ifma-intrinsics.ll
avx512ifmavl-intrinsics-fast-isel.ll
avx512ifmavl-intrinsics-upgrade.ll
avx512ifmavl-intrinsics.ll
avx512vbmi2-intrinsics-fast-isel.ll
avx512vbmi2-intrinsics-upgrade.ll
avx512vbmi2-intrinsics.ll
avx512vbmi2vl-intrinsics-fast-isel.ll
avx512vbmi2vl-intrinsics-upgrade.ll
avx512vbmi2vl-intrinsics.ll
avx512vbmi-intrinsics-fast-isel.ll
avx512vbmi-intrinsics-upgrade.ll
avx512vbmi-intrinsics.ll
avx512vbmivl-intrinsics-fast-isel.ll
avx512vbmivl-intrinsics-upgrade.ll
avx512vbmivl-intrinsics.ll
avx512vl_vnni-intrinsics-upgrade.ll
avx512vl_vnni-intrinsics.ll
avx512vl-arith.ll
avx512vl-intrinsics-canonical.ll
avx512vl-intrinsics-fast-isel.ll	Revert "[NFC][CodeGen] Add unary FNeg tests to X86/avx512vl-intrinsics-fast-isel.ll X86/combine-fabs.ll"	2019-06-13 19:24:34 +00:00
avx512vl-intrinsics-upgrade.ll
avx512vl-intrinsics.ll
avx512vl-logic.ll
avx512vl-mov.ll
avx512vl-nontemporal.ll
avx512vl-vbroadcast.ll
avx512vl-vec-cmp.ll
avx512vl-vec-masked-cmp.ll
avx512vl-vec-test-testn.ll
avx512vl-vpclmulqdq.ll
avx512vlcd-intrinsics-fast-isel.ll
avx512vlvp2intersect-intrinsics.ll
avx512vnni-intrinsics-upgrade.ll
avx512vnni-intrinsics.ll
avx512vp2intersect-intrinsics.ll
avx512vpopcntdq-intrinsics.ll
avx-arith.ll
avx-basic.ll
avx-bitcast.ll
avx-brcond.ll
avx-cast.ll
avx-cmp.ll
avx-cvt-2.ll
avx-cvt-3.ll
avx-cvt.ll
avx-cvttp2si.ll
avx-fp2int.ll
avx-gfni-intrinsics.ll
avx-insertelt.ll
avx-intel-ocl.ll
avx-intrinsics-fast-isel.ll
avx-intrinsics-x86_64.ll
avx-intrinsics-x86-upgrade.ll	[x86] split 256-bit store of concatenated vectors	2019-06-04 16:40:04 +00:00
avx-intrinsics-x86.ll	[x86] split 256-bit store of concatenated vectors	2019-06-04 16:40:04 +00:00
avx-isa-check.ll
avx-load-store.ll	[X86] Add DAG combine to turn (vzmovl (insert_subvector undef, X, 0)) into (insert_subvector allzeros, (vzmovl X), 0)	2019-06-21 19:10:21 +00:00
avx-logic.ll
avx-minmax.ll
avx-select.ll
avx-shift.ll
avx-shuffle-x86_32.ll
avx-splat.ll
avx-trunc.ll
avx-unpack.ll
avx-varargs-x86_64.ll
avx-vbroadcast.ll
avx-vbroadcastf128.ll
avx-vextractf128.ll
avx-vinsertf128.ll
avx-vpclmulqdq.ll
avx-vperm2x128.ll
avx-vzeroupper.ll
avx-win64-args.ll
avx-win64.ll
avx.ll
backpropmask.ll
bad-tls-fold.mir
barrier-sse.ll
barrier.ll
base-pointer-and-cmpxchg.ll
basic-promote-integers.ll
bb_rotate.ll
bc-extract.ll
bigstructret2.ll
bigstructret.ll
bit-piece-comment.ll
bit-test-shift.ll
bitcast2.ll
bitcast-and-setcc-128.ll
bitcast-and-setcc-256.ll
bitcast-and-setcc-512.ll
bitcast-i256.ll
bitcast-int-to-vector-bool-sext.ll
bitcast-int-to-vector-bool-zext.ll
bitcast-int-to-vector-bool.ll
bitcast-int-to-vector.ll
bitcast-mmx.ll
bitcast-setcc-128.ll
bitcast-setcc-256.ll
bitcast-setcc-512.ll	[X86][AVX] truncateVectorWithPACK - avoid bitcasted shuffles	2019-06-26 09:50:11 +00:00
bitcast-vector-bool.ll	[X86][AVX] truncateVectorWithPACK - avoid bitcasted shuffles	2019-06-26 09:50:11 +00:00
bitcast.ll
bitcnt-false-dep.ll
bitreverse.ll
block-placement.ll	[MBP] Move a latch block with conditional exit and multi predecessors to top of loop	2019-06-14 23:08:59 +00:00
block-placement.mir
bmi2-x86_64.ll
bmi2.ll
bmi-intrinsics-fast-isel-x86_64.ll
bmi-intrinsics-fast-isel.ll
bmi-x86_64.ll
bmi.ll	[X86] Add BLSI to isUseDefConvertible.	2019-06-20 17:52:53 +00:00
bool-ext-inc.ll
bool-math.ll
bool-simplify.ll
bool-vector.ll
bool-zext.ll
br-fold.ll
branchfolding-catchpads.ll
branchfolding-debugloc.ll
branchfolding-landingpads.ll
branchfolding-undef.mir
brcond.ll
break-anti-dependencies.ll
break-false-dep.ll
broadcast-elm-cross-splat-vec.ll
broadcastm-lowering.ll
bss_pagealigned.ll
bswap_tree2.ll
bswap_tree.ll
bswap-inline-asm.ll
bswap-rotate.ll
bswap-vector.ll
bswap-wide-int.ll
bswap.ll
bt.ll
btc_bts_btr.ll
btq.ll
bug26810.ll
bug37521.ll
build-vector-128.ll
build-vector-256.ll
build-vector-512.ll
buildvec-extract.ll
buildvec-insertvec.ll
bypass-slow-division-32.ll
bypass-slow-division-64.ll
bypass-slow-division-tune.ll
byval2.ll
byval3.ll
byval4.ll
byval5.ll
byval6.ll
byval7.ll
byval-align.ll
byval-callee-cleanup.ll
byval.ll
cache-intrinsic.ll
call-imm.ll
call-push.ll
callbr-asm-bb-exports.ll
callbr-asm-blockplacement.ll
callbr-asm-branch-folding.ll
callbr-asm-destinations.ll
callbr-asm-errors.ll
callbr-asm-outputs.ll
callbr-asm.ll
cas.ll
cast-vsel.ll	[x86] split 256-bit vector selects if operands are vector concats	2019-06-16 14:04:49 +00:00
catch.ll
catchpad-dynamic-alloca.ll
catchpad-lifetime.ll
catchpad-realign-savexmm.ll
catchpad-regmask.ll
catchpad-reuse.ll
catchpad-weight.ll	Rename ExpandISelPseudo->FinalizeISel, delay register reservation	2019-06-19 00:25:39 +00:00
catchret-empty-fallthrough.ll
catchret-fallthrough.ll
catchret-regmask.ll
cfi-inserter-cfg-with-merge.mir
cfi-inserter-check-order.ll
cfi-inserter-noreturnblock.mir
cfi-inserter-verify-inconsistent-offset.mir
cfi-inserter-verify-inconsistent-register.mir
cfi-xmm.ll
cfi.ll
cfstring.ll
cgp-usubo.ll
chain_order.ll
change-compare-stride-1.ll
change-compare-stride-trickiness-0.ll
change-compare-stride-trickiness-1.ll
change-compare-stride-trickiness-2.ll
change-unsafe-fp-math.ll
cldemote-intrinsic.ll
cleanuppad-inalloca.ll
cleanuppad-large-codemodel.ll
cleanuppad-realign.ll
clear_upper_vector_element_bits.ll
clear-highbits.ll
clear-lowbits.ll
clflushopt.ll
clwb.ll
clz.ll
clzero.ll
cmov-double.ll
cmov-fp.ll
cmov-into-branch.ll
cmov-promotion.ll	Teach the DAGCombine to fold this pattern(c1 and c2 is constant).	2019-06-26 05:12:53 +00:00
cmov.ll	[FIX] Forces shrink wrapping to consider any memory access as aliasing with the stack	2019-06-13 13:56:19 +00:00
cmovcmov.ll
cmp-fast-isel.ll
cmp.ll	[X86] When promoting i16 compare with immediate to i32, try to use sign_extend for eq/ne if the input is truncated from a type with enough sign its.	2019-06-10 04:50:12 +00:00
cmpxchg8b_alloca_regalloc_handling.ll
cmpxchg8b.ll
cmpxchg16b.ll
cmpxchg-clobber-flags.ll
cmpxchg-i1.ll
cmpxchg-i128-i1.ll
coal-sections.ll
coalesce_commute_movsd.ll
coalesce_commute_subreg.ll
coalesce-dbg-value-subreg-rewrite.mir
coalesce-dead-lanes.mir
coalesce-esp.ll
coalesce-implicitdef.ll
coalescer-commute1.ll
coalescer-commute2.ll
coalescer-commute3.ll
coalescer-commute4.ll
coalescer-commute5.ll
coalescer-cross.ll
coalescer-dce2.ll
coalescer-dce.ll
coalescer-identity.ll
coalescer-remat.ll
coalescer-subreg.ll
coalescer-win64.ll
code_placement_align_all.ll
code_placement_cold_loop_blocks.ll	[MBP] Move a latch block with conditional exit and multi predecessors to top of loop	2019-06-14 23:08:59 +00:00
code_placement_eh.ll
code_placement_ignore_succ_in_inner_loop.ll	[MBP] Move a latch block with conditional exit and multi predecessors to top of loop	2019-06-14 23:08:59 +00:00
code_placement_loop_rotation2.ll	[MBP] Move a latch block with conditional exit and multi predecessors to top of loop	2019-06-14 23:08:59 +00:00
code_placement_loop_rotation3.ll
code_placement_loop_rotation.ll
code_placement_no_header_change.ll	[MBP] Move a latch block with conditional exit and multi predecessors to top of loop	2019-06-14 23:08:59 +00:00
code_placement.ll	[MBP] Move a latch block with conditional exit and multi predecessors to top of loop	2019-06-14 23:08:59 +00:00
code-model-elf-memset.ll
code-model-elf.ll
code-model-kernel.ll
codegen-prepare-addrmode-sext.ll
codegen-prepare-cast.ll
codegen-prepare-crash.ll
codegen-prepare-extload.ll
codegen-prepare-replacephi.mir
codegen-prepare-uaddo.ll
codegen-prepare.ll
codemodel.ll
coff-comdat2.ll
coff-comdat3.ll
coff-comdat.ll
coff-feat00.ll
coff-no-dead-strip.ll
coff-weak.ll
coldcc64.ll
combine-64bit-vec-binop.ll
combine-abs.ll
combine-adc.ll
combine-add-ssat.ll
combine-add-usat.ll
combine-add.ll
combine-addo.ll
combine-adx.ll
combine-and.ll
combine-avx2-intrinsics.ll
combine-avx-intrinsics.ll
combine-bitreverse.ll
combine-bitselect.ll
combine-bswap.ll
combine-concatvectors.ll
combine-fabs.ll	Revert "[NFC][CodeGen] Add unary FNeg tests to X86/avx512vl-intrinsics-fast-isel.ll X86/combine-fabs.ll"	2019-06-13 19:24:34 +00:00
combine-fcopysign.ll	Revert "[NFC][CodeGen] Add unary FNeg tests to X86/combine-fcopysign.ll X86/dag-fmf-cse.ll X86/fast-isel-fneg.ll X86/fdiv.ll"	2019-06-13 19:24:38 +00:00
combine-lds.ll
combine-mul.ll	[DAGCombine] visitMUL - allow shift by zero in MulByConstant.	2019-06-24 12:47:17 +00:00
combine-mulo.ll
combine-multiplies.ll
combine-or.ll
combine-pmuldq.ll	[TargetLowering] SimplifyDemandedBits ZERO_EXTEND_VECTOR_INREG -> ANY_EXTEND_VECTOR_INREG	2019-06-25 12:57:43 +00:00
combine-rotates.ll
combine-sbb.ll
combine-sdiv.ll	[SelectionDAG] ComputeNumSignBits - support constant pool values from target	2019-06-04 10:49:06 +00:00
combine-select.ll
combine-sext-in-reg.ll
combine-shl.ll	[DAGCombiner] Support (shl (zext (srl x, C)), C) -> (zext (shl (srl x, C), C)) non-uniform folds.	2019-06-20 14:42:27 +00:00
combine-smax.ll
combine-smin.ll
combine-sra.ll
combine-srem.ll
combine-srl.ll
combine-sse41-intrinsics.ll
combine-sub-ssat.ll
combine-sub-usat.ll
combine-sub.ll
combine-subo.ll
combine-testm-and.ll
combine-udiv.ll
combine-umax.ll
combine-umin.ll
combine-urem.ll
commandline-metadata.ll
commute-3dnow.ll
commute-blend-avx2.ll
commute-blend-sse41.ll
commute-clmul.ll
commute-fcmp.ll
commute-intrinsic.ll
commute-two-addr.ll
commute-vpclmulqdq-avx512.ll
commute-vpclmulqdq-avx.ll
commute-xop.ll
commuted-blend-mask.ll
compact-unwind.ll
compare_folding.ll
compare-add.ll
compare-global.ll
compare-inf.ll
compiler_used.ll
complex-asm.ll
complex-fastmath.ll
complex-fca.ll
computeKnownBits_urem.ll
condbr_if.ll
condbr_switch.ll
conditional-indecrement.ll
conditional-tailcall-samedest.mir
conditional-tailcall.ll	[MBP] Move a latch block with conditional exit and multi predecessors to top of loop	2019-06-14 23:08:59 +00:00
consecutive-load-shuffle.ll
const-base-addr.ll
const-shift-of-constmasked.ll
constant-combines.ll
constant-hoisting-and.ll
constant-hoisting-bfi.ll
constant-hoisting-cmp.ll
constant-hoisting-optnone.ll
constant-hoisting-shift-immediate.ll
constant-pool-remat-0.ll
constant-pool-sharing.ll
constpool.ll
constrained-fp80-trunc-ext.ll	[FPEnv] Lower STRICT_FP_EXTEND and STRICT_FP_ROUND nodes in preprocess phase of ISelLowering to mirror non-strict nodes on x86.	2019-06-14 16:28:55 +00:00
constructor.ll
convert-2-addr-3-addr-inc64.ll
copy-eflags.ll	[FIX] Forces shrink wrapping to consider any memory access as aliasing with the stack	2019-06-13 13:56:19 +00:00
copy-propagation.ll
copysign-constant-magnitude.ll
cpus-amd-no-x86_64.ll
cpus-amd.ll
cpus-intel-no-x86_64.ll
cpus-intel.ll	[X86] -march=cooperlake (llvm)	2019-06-07 08:31:35 +00:00
cpus-no-x86_64.ll
cpus-other.ll
crash-lre-eliminate-dead-def.ll
crash-nosse.ll
crash-O0.ll
crash.ll
critical-anti-dep-breaker.ll
critical-edge-split-2.ll
cse-add-with-overflow.ll
cstring.ll
ctor-priority-coff.ll
ctpop-combine.ll	[SDAG] expand ctpop != 1	2019-06-25 14:46:52 +00:00
cvt16.ll
cvtv2f32.ll
cxx_tlscc64.ll
dag-fmf-cse.ll	Revert "[NFC][CodeGen] Add unary FNeg tests to X86/combine-fcopysign.ll X86/dag-fmf-cse.ll X86/fast-isel-fneg.ll X86/fdiv.ll"	2019-06-13 19:24:38 +00:00
dag-merge-fast-accesses.ll
dag-optnone.ll
dag-rauw-cse.ll
dag-update-nodetomatch.ll
dagcombine-and-setcc.ll
dagcombine-buildvector.ll
dagcombine-cse.ll
dagcombine-select.ll
dagcombine-shifts.ll
dagcombine-tokenfactor-limit-crash.ll	Recommit r360171: [DAGCombiner] Avoid creating large tokenfactors in visitTokenFactor.	2019-06-03 01:30:19 +00:00
dagcombine-unsafe-math.ll
darwin-bzero.ll
darwin-no-dead-strip.ll
darwin-preemption.ll
darwin-quote.ll
darwin-tls.ll
dbg-baseptr.ll
dbg-changes-codegen-branch-folding2.mir
dbg-changes-codegen-branch-folding.ll
dbg-changes-codegen.ll
dbg-combine.ll
dbg-line-0-no-discriminator.ll
dbg-value-superreg-copy.mir
DbgValueOtherTargets.test
debug-loclists.ll
debug-nodebug-crash.ll
debuginfo-locations-dce.ll
debugloc-argsize.ll
debugloc-no-line-0.ll
deopt-bundles.ll
deopt-intrinsic-cconv.ll
deopt-intrinsic.ll
disable-tail-calls.ll
discontiguous-loops.ll
discriminate-mem-ops-missing-info.ll
discriminate-mem-ops-skip-pfetch.ll
discriminate-mem-ops.ll
div8.ll
div-rem-simplify.ll
divide-by-constant.ll
divide-windows-itanium.ll
divrem8_ext.ll
divrem.ll
dllexport-x86_64.ll
dllexport.ll
dllimport-x86_64.ll
dllimport.ll
dollar-name.ll
domain-reassignment-implicit-def.ll
domain-reassignment-test.ll
domain-reassignment.mir
dont-trunc-store-double-to-float.ll
dropped_constructor.ll
dwarf-comp-dir.ll
dwarf-eh-prepare.ll
dwarf-headers.ll
dwarf-split-line-1.ll
dwarf-split-line-2.ll
dyn_alloca_aligned.ll
dyn-stackalloc.ll
dynamic-alloca-in-entry.ll
dynamic-alloca-lifetime.ll
dynamic-allocas-VLAs.ll
dynamic-regmask.ll
DynamicCalleeSavedRegisters.ll
early-cfi-sections.ll
early-ifcvt-crash.ll
early-ifcvt.ll
eh_frame.ll
eh-frame-unreachable.ll
eh-label.ll
eh-nolandingpads.ll
eh-null-personality.ll
eh-unknown.ll
eip-addressing-i386.ll
element-wise-atomic-memory-intrinsics.ll
elf-associated.ll
elf-comdat2.ll
elf-comdat.ll
emit-big-cst.ll
empty-function.ll
empty-functions.ll
empty-struct-return-type.ll
emutls_generic.ll
emutls-pic.ll
emutls-pie.ll
emutls.ll
enqcmd-intrinsics.ll
epilogue-cfi-fp.ll
epilogue-cfi-no-fp.ll
epilogue.ll
equiv_with_fndef.ll
equiv_with_vardef.ll
evex-to-vex-compress.mir	[X86] Remove MOVDI2SSrm/MOV64toSDrm/MOVSS2DImr/MOVSDto64mr CodeGenOnly instructions.	2019-06-18 03:23:15 +00:00
exception-label.ll
exedeps-movq.ll
exedepsfix-broadcast.ll
expand-integer-x86_64-intrinsic-error.ll
expand-opaque-const.ll
expand-post-ra-pseudo.mir
expand-vr64-gr64-copy.mir
extend-set-cc-uses-dbg.ll
extend.ll
extended-fma-contraction.ll
extern_weak.ll
extmul64.ll
extmul128.ll
extract-bits.ll	[NFC][X86] extract-{low,}bits.ll: one more pattern c with truncation	2019-06-03 08:44:09 +00:00
extract-combine.ll
extract-concat.ll
extract-extract.ll
extract-fp.ll
extract-insert.ll
extract-lowbits.ll	[NFC][X86] extract-{low,}bits.ll: one more pattern c with truncation	2019-06-03 08:44:09 +00:00
extract-store.ll
extractelement-fp.ll
extractelement-from-arg.ll
extractelement-index.ll
extractelement-legalization-cycle.ll
extractelement-legalization-store-ordering.ll
extractelement-load.ll
extractelement-shuffle.ll
extractps.ll
f16c-intrinsics-fast-isel.ll
f16c-intrinsics.ll
fabs.ll
fadd-combines.ll
fast-cc-callee-pops.ll
fast-cc-merge-stack-adj.ll
fast-cc-pass-in-regs.ll
fast-isel-abort-warm.ll
fast-isel-agg-constant.ll
fast-isel-args-fail2.ll
fast-isel-args-fail.ll
fast-isel-args.ll
fast-isel-atomic.ll
fast-isel-avoid-unnecessary-pic-base.ll
fast-isel-bail.ll
fast-isel-bc.ll
fast-isel-bitcasts-avx512.ll
fast-isel-bitcasts-avx.ll
fast-isel-bitcasts.ll
fast-isel-branch_weights.ll
fast-isel-call-bool.ll
fast-isel-call-cleanup.ll
fast-isel-call.ll
fast-isel-cmp-branch2.ll
fast-isel-cmp-branch3.ll
fast-isel-cmp-branch.ll
fast-isel-cmp.ll
fast-isel-constant.ll
fast-isel-constpool.ll
fast-isel-constrain-store-indexreg.ll
fast-isel-deadcode.ll
fast-isel-divrem-x86-64.ll
fast-isel-divrem.ll
fast-isel-double-half-convertion.ll
fast-isel-emutls.ll
fast-isel-expect.ll
fast-isel-extract.ll
fast-isel-float-half-convertion.ll
fast-isel-fneg-kill.ll	Rename ExpandISelPseudo->FinalizeISel, delay register reservation	2019-06-19 00:25:39 +00:00
fast-isel-fneg.ll	Revert "[NFC][CodeGen] Add unary FNeg tests to X86/combine-fcopysign.ll X86/dag-fmf-cse.ll X86/fast-isel-fneg.ll X86/fdiv.ll"	2019-06-13 19:24:38 +00:00
fast-isel-fold-mem.ll
fast-isel-fptrunc-fpext.ll
fast-isel-gc-intrinsics.ll
fast-isel-gep.ll
fast-isel-gv.ll
fast-isel-i1.ll
fast-isel-int-float-conversion-x86-64.ll
fast-isel-int-float-conversion.ll
fast-isel-load-i1.ll
fast-isel-mem.ll
fast-isel-movsbl-indexreg.ll
fast-isel-nontemporal.ll
fast-isel-noplt-pic.ll
fast-isel-ret-ext.ll
fast-isel-select-cmov2.ll
fast-isel-select-cmov.ll
fast-isel-select-cmp.ll
fast-isel-select-pseudo-cmov.ll
fast-isel-select-sse.ll
fast-isel-select.ll
fast-isel-sext-zext.ll
fast-isel-sext.ll
fast-isel-shift.ll
fast-isel-sse12-fptoint.ll
fast-isel-stackcheck.ll
fast-isel-store.ll
fast-isel-tailcall.ll
fast-isel-tls.ll
fast-isel-trunc-kill-subreg.ll
fast-isel-uint-float-conversion-x86-64.ll
fast-isel-uint-float-conversion.ll
fast-isel-vecload.ll
fast-isel-x32.ll
fast-isel-x86-64.ll
fast-isel-x86.ll
fast-isel.ll
fastcall-correct-mangling.ll
fastcc3struct.ll
fastcc-2.ll
fastcc-byval.ll
fastcc-sret.ll
fastcc.ll
fastisel-gep-promote-before-add.ll
fastisel-softfloat.ll
fastmath-float-half-conversion.ll
fcmove.ll
fcmp-constant.ll
fdiv-combine-vec.ll
fdiv-combine.ll	adding more fmf propagation for selects plus updated tests	2019-06-15 04:53:51 +00:00
fdiv.ll	Revert "[NFC][CodeGen] Add unary FNeg tests to X86/combine-fcopysign.ll X86/dag-fmf-cse.ll X86/fast-isel-fneg.ll X86/fdiv.ll"	2019-06-13 19:24:38 +00:00
fentry-insertion.ll
field-extract-use-trunc.ll
fildll.ll
file-directive.ll
file-source-filename.ll
finite-libcalls.ll
fixed-stack-di-mir.ll	Rename ExpandISelPseudo->FinalizeISel, delay register reservation	2019-06-19 00:25:39 +00:00
fixup-bw-copy.ll
fixup-bw-copy.mir
fixup-bw-inst.ll
fixup-bw-inst.mir
fixup-lea.ll
flags-copy-lowering.mir
float-asmprint.ll
float-conv-elim.ll
floor-soft-float.ll
fltused_function_pointer.ll
fltused_math.ll
fltused.ll
fma4-commute-x86.ll
fma4-fneg-combine.ll	Revert "[NFC][CodeGen] Add unary fneg tests to X86/fma4-fneg-combine.ll"	2019-06-13 19:25:03 +00:00
fma4-intrinsics-x86_64-folded-load.ll
fma4-intrinsics-x86-upgrade.ll
fma4-intrinsics-x86.ll	Revert "[NFC][CodeGen] Add unary fneg tests to X86/fma4-intrinsics-x86.ll"	2019-06-13 19:24:54 +00:00
fma4-scalar-memfold.ll
fma_patterns_wide.ll	Revert "[NFC][CodeGen] Add unary fneg tests to X86/fma_patterns_wide.ll"	2019-06-13 19:25:09 +00:00
fma_patterns.ll	Revert "[NFC][CodeGen] Add unary fneg tests to X86/fma_patterns.ll"	2019-06-13 19:25:06 +00:00
fma-commute-x86.ll
fma-do-not-commute.ll
fma-fneg-combine.ll	Revert "[NFC][CodeGen] Add unary fneg tests to X86/fma-fneg-combine.ll"	2019-06-13 19:24:41 +00:00
fma-intrinsics-canonical.ll	Revert "[NFC][CodeGen] Add unary FNeg tests to X86/fma-intrinsics-canonical.ll"	2019-06-13 19:24:47 +00:00
fma-intrinsics-fast-isel.ll	Revert "[NFC][CodeGen] Add unary FNeg tests to some X86/ and XCore/ tests."	2019-06-13 19:24:51 +00:00
fma-intrinsics-phi-213-to-231.ll
fma-intrinsics-x86-upgrade.ll
fma-intrinsics-x86.ll	Revert "[NFC][CodeGen] Add unary fneg tests to X86/fma-intrinsics-x86.ll"	2019-06-13 19:24:57 +00:00
fma-phi-213-to-231.ll
fma-scalar-combine.ll	Revert "[NFC][CodeGen] Add unary fneg tests to X86/fma-scalar-combine.ll"	2019-06-13 19:25:00 +00:00
fma-scalar-memfold.ll
fma.ll
fmaddsub-combine.ll
fmaxnum.ll
fmf-flags.ll
fmf-propagation.ll	Propagate fmf for setcc in SDAG for select folds	2019-06-03 21:53:26 +00:00
fminnum.ll
fmsubadd-combine.ll
fmul-combines.ll	Revert "[NFC][CodeGen] Add unary fneg tests to fmul-combines.ll fnabs.ll"	2019-06-13 19:25:12 +00:00
fnabs.ll	Revert "[NFC][CodeGen] Add unary fneg tests to fmul-combines.ll fnabs.ll"	2019-06-13 19:25:12 +00:00
fold-add.ll
fold-and-shift-x86_64.ll
fold-and-shift.ll
fold-call-2.ll
fold-call-3.ll
fold-call-oper.ll
fold-call.ll
fold-imm.ll
fold-load-binops.ll	[X86] Add load folding isel patterns to scalar_math_patterns and AVX512_scalar_math_fp_patterns.	2019-06-11 04:30:53 +00:00
fold-load-unops.ll
fold-load-vec.ll
fold-load.ll
fold-mul-lohi.ll
fold-pcmpeqd-1.ll
fold-pcmpeqd-2.ll	[FIX] Forces shrink wrapping to consider any memory access as aliasing with the stack	2019-06-13 13:56:19 +00:00
fold-push.ll
fold-rmw-ops.ll
fold-sext-trunc.ll
fold-tied-op.ll
fold-vector-bv-crash.ll
fold-vector-sext-crash2.ll
fold-vector-sext-crash.ll
fold-vector-sext-zext.ll
fold-vector-shl-crash.ll
fold-vector-shuffle-crash.ll
fold-vector-trunc-sitofp.ll
fold-vex.ll
fold-xmm-zero.ll
fold-zext-trunc.ll
fops-windows-itanium.ll
force-align-stack-alloca.ll
force-align-stack.ll
fp2sint.ll
fp128-calling-conv.ll
fp128-cast.ll
fp128-compare.ll
fp128-extract.ll
fp128-g.ll
fp128-i128.ll
fp128-libcalls.ll
fp128-load.ll
fp128-select.ll
fp128-store.ll
fp_constant_op.ll
fp_load_cast_fold.ll
fp_load_fold.ll
fp-arith.ll
fp-cvt.ll
fp-double-rounding.ll
fp-elim-and-no-fp-elim.ll
fp-elim.ll
fp-fast.ll	Revert "[NFC][CodeGen] Add unary fneg tests to fp-fast.ll fp-fold.ll fp-in-intregs.ll fp-stack-compare-cmov.ll fp-stack-compare.ll fsxor-alignment.ll"	2019-06-13 19:25:16 +00:00
fp-fold.ll	Revert "[NFC][CodeGen] Add unary fneg tests to fp-fast.ll fp-fold.ll fp-in-intregs.ll fp-stack-compare-cmov.ll fp-stack-compare.ll fsxor-alignment.ll"	2019-06-13 19:25:16 +00:00
fp-immediate-shorten.ll
fp-in-intregs.ll	Revert "[NFC][CodeGen] Add unary fneg tests to fp-fast.ll fp-fold.ll fp-in-intregs.ll fp-stack-compare-cmov.ll fp-stack-compare.ll fsxor-alignment.ll"	2019-06-13 19:25:16 +00:00
fp-intrinsics.ll
fp-load-trunc.ll
fp-logic-replace.ll
fp-logic.ll
fp-select-cmp-and.ll
fp-stack-2results.ll
fp-stack-compare-cmov.ll	Revert "[NFC][CodeGen] Add unary fneg tests to fp-fast.ll fp-fold.ll fp-in-intregs.ll fp-stack-compare-cmov.ll fp-stack-compare.ll fsxor-alignment.ll"	2019-06-13 19:25:16 +00:00
fp-stack-compare.ll	Revert "[NFC][CodeGen] Add unary fneg tests to fp-fast.ll fp-fold.ll fp-in-intregs.ll fp-stack-compare-cmov.ll fp-stack-compare.ll fsxor-alignment.ll"	2019-06-13 19:25:16 +00:00
fp-stack-direct-ret.ll
fp-stack-O0-crash.ll
fp-stack-O0.ll
fp-stack-ret-conv.ll
fp-stack-ret-store.ll
fp-stack-ret.ll
fp-stack-retcopy.ll
fp-stack-set-st1.ll
fp-stack.ll
fp-trunc.ll
fp-undef.ll
fp-une-cmp.ll
fpcmp-soft-fp.ll
fpstack-debuginstr-kill.ll
fptosi-constant.ll
frame-base.ll
frame-lowering-debug-intrinsic-2.ll
frame-lowering-debug-intrinsic.ll
frame-order.ll
frameaddr.ll
frameregister.ll
frem-msvc32.ll
fsgsbase.ll
fshl.ll
fshr.ll
fsxor-alignment.ll	Revert "[NFC][CodeGen] Add unary fneg tests to fp-fast.ll fp-fold.ll fp-in-intregs.ll fp-stack-compare-cmov.ll fp-stack-compare.ll fsxor-alignment.ll"	2019-06-13 19:25:16 +00:00
ftrunc.ll
full-lsr.ll
funclet-layout.ll
function-alias.ll
function-subtarget-features-2.ll
function-subtarget-features.ll
funnel-shift-rot.ll
funnel-shift.ll
ga-offset2.ll
ga-offset.ll
gather-addresses.ll
gcc_except_table_functions.ll
gcc_except_table.ll
gep-expanded-vector.ll
getelementptr.ll
gfni-intrinsics.ll
ghc-cc64.ll
ghc-cc.ll
global-access-pie-copyrelocs.ll
global-access-pie.ll
global-fill.ll
global-sections-comdat.ll
global-sections-tls.ll
global-sections.ll
gnu-seh-nolpads.ll
gpr-to-mask.ll
greedy_regalloc_bad_eviction_sequence.ll
gs-fold.ll
h-register-addressing-32.ll
h-register-addressing-64.ll
h-register-store.ll
h-registers-0.ll
h-registers-1.ll
h-registers-2.ll
h-registers-3.ll
haddsub-2.ll
haddsub-3.ll
haddsub-shuf.ll	[X86][AVX] Add broadcast(v4f64 hadd) test	2019-06-13 11:42:32 +00:00
haddsub-undef.ll
haddsub.ll	Change semantics of fadd/fmul vector reductions.	2019-06-11 08:22:10 +00:00
half.ll
handle-move.ll
hhvm-cc.ll
hidden-vis-2.ll
hidden-vis-3.ll
hidden-vis-4.ll
hidden-vis-pic.ll
hidden-vis.ll
hipe-cc64.ll
hipe-cc.ll
hipe-prologue.ll
hoist-and-by-const-from-lshr-in-eqcmp-zero.ll	[NFC][Codegen][X86] Add AVX2 runline for '(X & (C l>> Y)) ==/!= 0' tests	2019-06-05 14:08:11 +00:00
hoist-and-by-const-from-shl-in-eqcmp-zero.ll	[NFC][Codegen][X86] Add AVX2 runline for '(X & (C l>> Y)) ==/!= 0' tests	2019-06-05 14:08:11 +00:00
hoist-common.ll
hoist-invariant-load.ll
hoist-spill-lpad.ll
hoist-spill.ll
horizontal-reduce-smax.ll	[X86][SSE] Fold extract_subvector(vselect(x,y,z),0) -> vselect(extract_subvector(x,0),extract_subvector(y,0),extract_subvector(z,0))	2019-06-22 17:57:01 +00:00
horizontal-reduce-smin.ll	[X86][SSE] Fold extract_subvector(vselect(x,y,z),0) -> vselect(extract_subvector(x,0),extract_subvector(y,0),extract_subvector(z,0))	2019-06-22 17:57:01 +00:00
horizontal-reduce-umax.ll	[X86][SSE] Fold extract_subvector(vselect(x,y,z),0) -> vselect(extract_subvector(x,0),extract_subvector(y,0),extract_subvector(z,0))	2019-06-22 17:57:01 +00:00
horizontal-reduce-umin.ll	[X86][SSE] Fold extract_subvector(vselect(x,y,z),0) -> vselect(extract_subvector(x,0),extract_subvector(y,0),extract_subvector(z,0))	2019-06-22 17:57:01 +00:00
horizontal-shuffle-demanded.ll
horizontal-shuffle.ll
huge-stack-offset2.ll
huge-stack-offset.ll
i1narrowfail.ll
i2k.ll
i16lshr8pat.ll	Rename ExpandISelPseudo->FinalizeISel, delay register reservation	2019-06-19 00:25:39 +00:00
i64-mem-copy.ll
i64-to-float.ll
i128-and-beyond.ll
i128-immediate.ll
i128-mul.ll
i128-ret.ll
i128-sdiv.ll
i256-add.ll
i386-setjmp-pic.ll
i386-shrink-wrapping.ll	[FIX] Forces shrink wrapping to consider any memory access as aliasing with the stack	2019-06-13 13:56:19 +00:00
i386-tlscall-fastregalloc.ll
i486-fence-loop.ll
i686-win-shrink-wrapping.ll
iabs.ll
icall-branch-funnel.ll
icmp-opt.ll
ident-metadata.ll
ifunc-asm.ll
illegal-bitfield-loadstore.ll
illegal-insert.ll
illegal-vector-args-return.ll
immediate_merging64.ll
immediate_merging.ll
implicit-faultmap.ll
implicit-null-check-negative.ll
implicit-null-check.ll
implicit-null-checks.mir
implicit-null-chk-reg-rewrite.mir
implicit-use-spill.mir
imul-lea-2.ll
imul-lea.ll
imul.ll
inalloca-ctor.ll
inalloca-invoke.ll
inalloca-regparm.ll
inalloca-stdcall.ll
inalloca.ll
inconsistent_landingpad.ll
indirect-branch-tracking-r2.ll
indirect-branch-tracking.ll
indirect-hidden.ll
init-priority.ll
inline-0bh.ll
inline-asm-2addr.ll
inline-asm-A-constraint.ll
inline-asm-avx512f-v-constraint.ll
inline-asm-avx512f-x-constraint.ll	Rename ExpandISelPseudo->FinalizeISel, delay register reservation	2019-06-19 00:25:39 +00:00
inline-asm-avx512vl-v-constraint-32bit.ll
inline-asm-avx512vl-v-constraint.ll
inline-asm-avx-v-constraint-32bit.ll
inline-asm-avx-v-constraint.ll
inline-asm-bad-constraint-n.ll
inline-asm-bad-modifier.ll
inline-asm-default-clobbers.ll	Rename ExpandISelPseudo->FinalizeISel, delay register reservation	2019-06-19 00:25:39 +00:00
inline-asm-duplicated-constraint.ll
inline-asm-error.ll
inline-asm-flag-clobber.ll
inline-asm-flag-output.ll
inline-asm-fpstack.ll
inline-asm-h.ll
inline-asm-i-constraint-i1.ll
inline-asm-modifier-c.ll
inline-asm-modifier-n.ll
inline-asm-modifier-q.ll
inline-asm-modifier-V.ll
inline-asm-mrv.ll
inline-asm-multilevel-gep.ll
inline-asm-out-regs.ll
inline-asm-pic.ll
inline-asm-ptr-cast.ll
inline-asm-q-regs.ll
inline-asm-R-constraint.ll
inline-asm-sp-clobber-memcpy.ll
inline-asm-stack-realign2.ll
inline-asm-stack-realign3.ll
inline-asm-stack-realign.ll
inline-asm-tied.ll
inline-asm-x-scalar.ll
inline-asm.ll
inline-sse.ll
inlineasm-sched-bug.ll
inreg.ll
ins_split_regalloc.ll
ins_subreg_coalesce-1.ll
ins_subreg_coalesce-2.ll
ins_subreg_coalesce-3.ll
insert-into-constant-vector.ll
insert-loaded-scalar.ll
insert-positions.ll
insert-prefetch-inline.afdo
insert-prefetch-inline.ll
insert-prefetch-invalid-instr.afdo
insert-prefetch-invalid-instr.ll
insert-prefetch-other.afdo
insert-prefetch.afdo
insert-prefetch.ll
insertelement-copytoregs.ll
insertelement-duplicates.ll
insertelement-legalize.ll
insertelement-ones.ll
insertelement-shuffle.ll
insertelement-var-index.ll
insertelement-zero.ll
insertps-combine.ll
insertps-from-constantpool.ll
insertps-O0-bug.ll
insertps-unfold-load-bug.ll
instr-symbols.mir
int-intrinsic.ll
intersect-fma-fmf.ll
interval-update-remat.ll
invalid-liveness.mir
invalid-shift-immediate.ll
invpcid-intrinsic.ll
ipra-inline-asm.ll
ipra-local-linkage.ll
ipra-reg-alias.ll
ipra-reg-usage.ll
ipra-transform.ll
is-constant.ll
isel-optnone.ll
isel-sink2.ll
isel-sink3.ll
isel-sink.ll
isint.ll
isnan2.ll
isnan.ll
ispositive.ll
jump_sign.ll
known-bits-vector.ll
known-bits.ll
known-signbits-vector.ll	[x86] split 256-bit vector selects if operands are vector concats	2019-06-16 14:04:49 +00:00
kshift.ll
label-annotation.ll
label-heapallocsite.ll
label-redefinition.ll
lack-of-signed-truncation-check.ll
lakemont.ll
large-code-model-isel.ll
large-constants.ll
large-gep-chain.ll
large-gep-scale.ll
large-global.ll
large-pic-string.ll
late-address-taken.ll
late-remat-update-2.mir
late-remat-update.mir
ldzero.ll
lea-2.ll
lea-3.ll
lea-4.ll
lea-5.ll
lea-dagdag.ll
lea-opt-cse1.ll
lea-opt-cse2.ll
lea-opt-cse3.ll
lea-opt-cse4.ll
lea-opt-memop-check-1.ll
lea-opt-memop-check-2.ll
lea-opt-with-debug.mir
lea-opt.ll
lea-recursion.ll
lea.ll
leaf-fp-elim.ll
leaFixup32.mir
leaFixup64.mir
legalize-fmp-oeq-vector-select.ll
legalize-libcalls.ll
legalize-shift-64.ll
legalize-shift.ll
legalize-shl-vec.ll
legalize-sub-zero-2.ll
legalize-sub-zero.ll
legalize-types-remapid.ll
legalize-vaarg.ll	[SelectionDAG] Legalize vaargs that require vector splitting	2019-06-18 12:24:02 +00:00
legalizedag_vec.ll
libcall-sret.ll
licm-dominance.ll
licm-nested.ll
licm-regpressure.ll
licm-symbol.ll
lifetime-alias.ll
limit-split-cost.mir
limited-prec.ll
linux-preemption.ll
lit.local.cfg	[lit] Delete empty lines at the end of lit.local.cfg NFC	2019-06-17 09:51:07 +00:00
live-out-reg-info.ll
live-range-nosubreg.ll
liveness-local-regalloc.ll
llc-override-mcpu-mattr.ll
llc-print-machineinstrs.mir
llc-start-stop-instance.ll
llrint-conv-i32.ll
llrint-conv.ll
llround-conv-i32.ll
llround-conv.ll
load-combine-dbg.ll
load-combine.ll
load-local-v3i1.ll
load-scalar-as-vector.ll
load-slice.ll
loadStore_vectorizer.ll
loc-remat.ll
local_stack_symbol_ordering.ll
localescape.ll
log2_not_readnone.ll
logical-load-fold.ll
long-setcc.ll
longlong-deadload.ll
loop-blocks.ll	[MBP] Move a latch block with conditional exit and multi predecessors to top of loop	2019-06-14 23:08:59 +00:00
loop-hoist.ll
loop-rotate.ll	[MBP] Move a latch block with conditional exit and multi predecessors to top of loop	2019-06-14 23:08:59 +00:00
loop-search.ll	[Codegen] Merge tail blocks with no successors after block placement	2019-06-13 18:11:32 +00:00
loop-strength-reduce2.ll
loop-strength-reduce4.ll
loop-strength-reduce5.ll
loop-strength-reduce6.ll
loop-strength-reduce7.ll
loop-strength-reduce8.ll
loop-strength-reduce-2.ll
loop-strength-reduce-3.ll
loop-strength-reduce-crash.ll
loop-strength-reduce.ll
lower-bitcast.ll
lower-vec-shift-2.ll
lower-vec-shift.ll
lower-vec-shuffle-bug.ll
lrint-conv-i32.ll
lrint-conv.ll
lround-conv-i32.ll
lround-conv.ll
lrshrink.ll
lsr-crash-empty-uses.ll
lsr-delayed-fold.ll
lsr-i386.ll
lsr-interesting-step.ll
lsr-loop-exit-cond.ll	[MBP] Move a latch block with conditional exit and multi predecessors to top of loop	2019-06-14 23:08:59 +00:00
lsr-negative-stride.ll
lsr-nonaffine.ll
lsr-normalization.ll
lsr-overflow.ll
lsr-quadratic-expand.ll
lsr-redundant-addressing.ll
lsr-reuse-trunc.ll
lsr-reuse.ll
lsr-sort.ll
lsr-static-addr.ll
lsr-wrap.ll
lwp-intrinsics-x86_64.ll
lwp-intrinsics.ll
lzcnt-tzcnt.ll
lzcnt-zext-cmp.ll
lzcnt.ll
machine-combiner-int-vec.ll	[X86] Add the vector integer min/max instructions to isAssociativeAndCommutative.	2019-06-05 18:25:09 +00:00
machine-combiner-int.ll
machine-combiner.ll	[X86] Add avx512 command lines and test cases to machine-combiner.ll	2019-06-02 00:07:48 +00:00
machine-copy-prop.mir
machine-cp-debug.mir
machine-cp.ll	[Codegen] Merge tail blocks with no successors after block placement	2019-06-13 18:11:32 +00:00
machine-cse.ll
machine-outliner-debuginfo.ll
machine-outliner-disubprogram.ll
machine-outliner-noredzone.ll
machine-outliner-tailcalls.ll
machine-outliner.ll
machine-region-info.mir
machine-sink-and-implicit-null-checks.ll
machine-sink.ll
machine-trace-metrics-crash.ll
MachineBranchProb.ll	Rename ExpandISelPseudo->FinalizeISel, delay register reservation	2019-06-19 00:25:39 +00:00
MachineSink-CritEdge.ll
MachineSink-DbgValue.ll
MachineSink-eflags.ll	[FIX] Forces shrink wrapping to consider any memory access as aliasing with the stack	2019-06-13 13:56:19 +00:00
machinesink-merge-debuginfo.ll
machinesink-null-debuginfo.ll
MachineSink-PHIUse.ll
MachineSink-SubReg.ll
macho-comdat.ll
macho-trap.ll
madd.ll
mangle-question-mark.ll
mask-negated-bool.ll
masked_compressstore.ll	[TargetLowering] SimplifyDemandedBits - legal checks for SIGN/ZERO_EXTEND -> ZERO/ANY_EXTEND	2019-06-25 10:51:15 +00:00
masked_expandload.ll	[TargetLowering] SimplifyDemandedBits - legal checks for SIGN/ZERO_EXTEND -> ZERO/ANY_EXTEND	2019-06-25 10:51:15 +00:00
masked_gather_scatter_widen.ll
masked_gather_scatter.ll	[TargetLowering] SimplifyDemandedBits - legal checks for SIGN/ZERO_EXTEND -> ZERO/ANY_EXTEND	2019-06-25 10:51:15 +00:00
masked_gather.ll	[MIR] Add simple PRE pass to MachineCSE	2019-06-09 12:15:47 +00:00
masked_load.ll	[TargetLowering] SimplifyDemandedBits - legal checks for SIGN/ZERO_EXTEND -> ZERO/ANY_EXTEND	2019-06-25 10:51:15 +00:00
masked_store_trunc_ssat.ll	[MIR] Add simple PRE pass to MachineCSE	2019-06-09 12:15:47 +00:00
masked_store_trunc_usat.ll	[MIR] Add simple PRE pass to MachineCSE	2019-06-09 12:15:47 +00:00
masked_store_trunc.ll	[MIR] Add simple PRE pass to MachineCSE	2019-06-09 12:15:47 +00:00
masked_store.ll	[MIR] Add simple PRE pass to MachineCSE	2019-06-09 12:15:47 +00:00
masked-iv-safe.ll
masked-iv-unsafe.ll
maskmovdqu.ll
materialize.ll
mature-mc-support.ll
mbp-false-cfg-break.ll
mcinst-avx-lowering.ll
mcinst-lowering.ll
mcu-abi.ll
mem-intrin-base-reg.ll
mem-promote-integers.ll
membarrier.ll
memcmp-mergeexpand.ll
memcmp-minsize.ll
memcmp-optsize.ll
memcmp.ll	[ExpandMemCmp] Honor prefer-vector-width.	2019-06-26 07:06:49 +00:00
memcpy-2.ll
memcpy-from-string.ll
memcpy-struct-by-value.ll
memcpy.ll
mempcpy-32.ll
mempcpy.ll
memset64-on-x86-32.ll
memset-2.ll
memset-3.ll
memset-nonzero.ll	[x86] split more 256-bit stores of concatenated vectors	2019-06-05 16:40:57 +00:00
memset-sse-stack-realignment.ll
memset-zero.ll
memset.ll
merge_store_duplicated_loads.ll
merge_store.ll
merge-consecutive-loads-128.ll
merge-consecutive-loads-256.ll
merge-consecutive-loads-512.ll
merge-consecutive-stores-i1.ll
merge-consecutive-stores-nt.ll	[X86][SSE] Scalarize under-aligned XMM vector nt-stores (PR42026)	2019-06-17 18:20:04 +00:00
merge-consecutive-stores.ll
merge-sp-update-lea.ll
merge-sp-updates-cfi.ll
merge-store-constants.ll
merge-store-partially-alias-loads.ll
merge-vector-stores-scale-idx-crash.ll
MergeConsecutiveStores.ll
mfence.ll
midpoint-int-vec-128.ll
midpoint-int-vec-256.ll	[x86] narrow extract subvector of vector select	2019-06-07 13:17:46 +00:00
midpoint-int-vec-512.ll
midpoint-int.ll
min-legal-vector-width.ll
mingw-alloca.ll
mingw-comdats-xdata.ll
mingw-comdats.ll
mingw-refptr.ll
misaligned-memset.ll
misched_phys_reg_assign_order.ll
misched-aa-colored.ll
misched-aa-mmos.ll
misched-balance.ll
misched-code-difference-with-debug.ll
misched-copy.ll
misched-crash.ll
misched-fusion.ll
misched-ilp.ll
misched-matmul.ll
misched-matrix.ll
misched-new.ll
mmx-arg-passing-x86-64.ll
mmx-arg-passing.ll
mmx-arith.ll
mmx-bitcast-fold.ll
mmx-bitcast.ll
mmx-build-vector.ll
mmx-coalescing.ll
mmx-copy-gprs.ll
mmx-cvt.ll
mmx-fold-load.ll
mmx-fold-zero.ll
mmx-intrinsics.ll
mmx-only.ll
mod128.ll
movbe.ll
movddup-load-fold.ll
movdir-intrinsic-x86_64.ll
movdir-intrinsic-x86.ll
move_latch_to_loop_top.ll	[MBP] Move a latch block with conditional exit and multi predecessors to top of loop	2019-06-14 23:08:59 +00:00
movfs.ll
movgs.ll
movmsk-cmp.ll	[X86][AVX] truncateVectorWithPACK - avoid bitcasted shuffles	2019-06-26 09:50:11 +00:00
movmsk.ll
movntdq-no-avx.ll
movpc32-check.ll
movtopush64.ll
movtopush.ll
movtopush.mir	Describe stack-id as an enum	2019-06-17 09:13:29 +00:00
ms-inline-asm-avx512.ll
ms-inline-asm-redundant-clobber.ll
ms-inline-asm.ll
mul64.ll
mul128_sext_loop.ll
mul128.ll
mul-constant-i8.ll
mul-constant-i16.ll
mul-constant-i32.ll
mul-constant-i64.ll
mul-constant-result.ll	[Codegen] Merge tail blocks with no successors after block placement	2019-06-13 18:11:32 +00:00
mul-i256.ll
mul-i512.ll
mul-i1024.ll
mul-legalize.ll
mul-remat.ll
mul-shift-reassoc.ll
mulo-pow2.ll
muloti.ll
mult-alt-generic-i686.ll
mult-alt-generic-x86_64.ll
mult-alt-x86.ll
multiple-loop-post-inc.ll
multiple-return-values-cross-block.ll
mulvi32.ll
mulx32.ll
mulx64.ll
musttail-fastcall.ll
musttail-indirect.ll
musttail-thiscall.ll
musttail-varargs.ll
musttail.ll
mwaitx.ll
named-reg-alloc.ll
named-reg-notareg.ll
nancvt.ll
narrow_op-1.ll
narrow-shl-cst.ll
narrow-shl-load.ll
neg_cmp.ll
neg_fp.ll	Revert "[NFC][CodeGen] Add unary FNeg tests to some X86/ and XCore/ tests."	2019-06-13 19:24:51 +00:00
neg-of-3ops-lea.ll	[X86][Codegen] Add missed pattern that may be a lea+neg	2019-06-08 19:38:14 +00:00
neg-shl-add.ll
negate-add-zero.ll
negate-i1.ll
negate-shift.ll
negate.ll
negative_zero.ll
negative-offset.ll
negative-sin.ll
negative-stride-fptosi-user.ll
negative-subscript.ll
new-remat.ll
newline-and-quote.ll
no-and8ri8.ll
no-cmov.ll
no-plt-libcalls.ll
no-plt.ll
no-prolog-kill.ll
no-sse2-avg.ll
no-stack-arg-probe.ll
nobt.ll
nocf_check.ll
nocx16.ll
non-lazy-bind.ll
non-unique-sections.ll
non-value-mem-operand.mir	[X86] Introduce new MOVSSrm/MOVSDrm opcodes that use VR128 register class.	2019-06-18 03:23:11 +00:00
nonconst-static-ev.ll
nonconst-static-iv.ll
nontemporal-2.ll	[X86][AVX] Split under-aligned vector nt-stores.	2019-06-17 17:22:38 +00:00
nontemporal-3.ll	[X86][SSE] Scalarize under-aligned XMM vector nt-stores (PR42026)	2019-06-17 18:20:04 +00:00
nontemporal-loads-2.ll	[X86][SSE] Add tests for underaligned nt loads	2019-06-17 14:38:17 +00:00
nontemporal-loads.ll
nontemporal.ll
noreturn-call.ll
norex-subreg.ll
nosse-error1.ll
nosse-error2.ll
nosse-varargs.ll
nosse-vector.ll
not-and-simplify.ll
note-cet-property.ll
note-sections.ll
null-streamer.ll
O0-pipeline.ll	Rename ExpandISelPseudo->FinalizeISel, delay register reservation	2019-06-19 00:25:39 +00:00
O3-pipeline.ll	Rename ExpandISelPseudo->FinalizeISel, delay register reservation	2019-06-19 00:25:39 +00:00
objc-gc-module-flags.ll
object-size.ll
oddshuffles.ll	[x86] split more 256-bit stores of concatenated vectors	2019-06-05 16:40:57 +00:00
oddsubvector.ll	[x86] split 256-bit store of concatenated vectors	2019-06-04 16:40:04 +00:00
omit-urem-of-power-of-two-or-zero-when-comparing-with-zero.ll	[Codegen] TargetLowering::SimplifySetCC(): omit urem when possible	2019-06-25 10:01:42 +00:00
opaque-constant-asm.ll
opt_phis2.mir
opt_phis.mir
opt-ext-uses.ll
opt-shuff-tstore.ll
optimize-max-0.ll
optimize-max-1.ll
optimize-max-2.ll
optimize-max-3.ll
or-address.ll
or-branch.ll	[Peephole] Allow folding loads into instructions w/multiple uses (such as test64rr)	2019-06-25 17:29:18 +00:00
or-lea.ll
osx-private-labels.ll
overflow-intrinsic-setcc-fold.ll
overflow.ll
overlap-shift.ll
packed_struct.ll
packss.ll
paddus.ll
palignr.ll
parity.ll
partial-fold32.ll
partial-fold64.ll
partition.ll
pass-three.ll
patchable-prologue.ll
patchpoint-invoke.ll
patchpoint-verifiable.mir
patchpoint-webkit_jscc.ll
patchpoint.ll
pause.ll
peep-setb.ll
peep-test-0.ll
peep-test-1.ll
peep-test-2.ll
peep-test-3.ll
peep-test-4.ll
peephole-cvt-sse.ll
peephole-fold-movsd.ll
peephole-fold-testrr.mir	[Peephole] Allow folding loads into instructions w/multiple uses (such as test64rr)	2019-06-25 17:29:18 +00:00
peephole-multiple-folds.ll
peephole-na-phys-copy-folding.ll
peephole-recurrence.mir
peephole.mir
personality_size.ll
personality.ll
phaddsub-extract.ll
phaddsub-undef.ll
phaddsub.ll	[X86] isHorizontalBinOp - add extract_subvector(shuffle(x)) handling (PR39921)	2019-06-02 15:47:49 +00:00
phi-bit-propagation.ll
phi-immediate-factoring.ll
phielim-split.ll
phys_subreg_coalesce-2.ll
phys_subreg_coalesce-3.ll
phys_subreg_coalesce.ll
phys-reg-local-regalloc.ll
physreg-pairs-error.ll
physreg-pairs.ll
pic_jumptable.ll
pic-load-remat.ll
pic.ll
pie.ll
pku.ll
pmaddubsw.ll
pmovext.ll
pmovsx-inreg.ll	[x86] split 256-bit store of concatenated vectors	2019-06-04 16:40:04 +00:00
pmul.ll	[TargetLowering] SimplifyDemandedBits ZERO_EXTEND_VECTOR_INREG -> ANY_EXTEND_VECTOR_INREG	2019-06-25 12:57:43 +00:00
pmulh.ll
pmulld.ll
pointer-vector.ll
pop-stack-cleanup-msvc.ll
pop-stack-cleanup.ll
popcnt.ll	[X86] Add i128 ctpop and i32/i64/i128 optsize test cases to popcnt.ll	2019-06-18 04:52:49 +00:00
post-ra-sched-with-debug.mir
post-ra-sched.ll
postalloc-coalescing.ll
postra-ignore-dbg-instrs.mir
postra-licm.ll
pow.75.ll
pow.ll
powi.ll
pr1462.ll
pr1489.ll
pr1505.ll
pr1505b.ll
pr2177.ll
pr2182.ll
pr2326.ll
pr2585.ll
pr2656.ll
pr2659.ll
pr2849.ll
pr2924.ll
pr2982.ll
pr3154.ll
pr3216.ll
pr3241.ll
pr3243.ll
pr3244.ll
pr3250.ll
pr3317.ll
pr3366.ll
pr3457.ll
pr3522.ll
pr5145.ll
pr7882.ll
pr9127.ll
pr9517.ll
pr9743.ll
pr10068.ll
pr10475.ll
pr10499.ll
pr10523.ll
pr10524.ll
pr10525.ll
pr10526.ll
pr11202.ll
pr11334.ll
pr11415.ll
pr11468.ll
pr11985.ll
pr11998.ll
pr12360.ll
pr12889.ll
pr13209.ll
pr13220.ll
pr13458.ll
pr13577.ll
pr13859.ll
pr13899.ll
pr14088.ll
pr14098.ll
pr14161.ll
pr14204.ll
pr14314.ll
pr14333.ll
pr14562.ll
pr15267.ll
pr15296.ll
pr15309.ll
pr15705.ll
pr15981.ll
pr16031.ll
pr16360.ll
pr16807.ll
pr17546.ll
pr17631.ll
pr17764.ll
pr18014.ll
pr18054.ll
pr18162.ll
pr18344.ll
pr18846.ll
pr19049.ll
pr20011.ll
pr20012.ll
pr20020.ll
pr20088.ll
pr21099.ll
pr21792.ll
pr22019.ll
pr22103.ll
pr22338.ll
pr22473.ll
pr22774.ll
pr22970.ll
pr23103.ll
pr23246.ll
pr23273.ll
pr23603.ll
pr23664.ll
pr24139.ll
pr24374.ll
pr24602.ll
pr25828.ll
pr26350.ll
pr26625.ll
pr26652.ll
pr26757.ll
pr26835.ll
pr26870.ll
pr27071.ll
pr27202.ll
pr27501.ll
pr27591.ll
pr27681.mir
pr28129.ll
pr28173.ll
pr28444.ll
pr28472.ll
pr28489.ll
pr28515.ll
pr28560.ll
pr28824.ll
pr29010.ll
pr29022.ll
pr29061.ll
pr29112.ll	[X86][AVX] combineX86ShuffleChain - combine shuffle(extractsubvector(x),extractsubvector(y))	2019-06-05 12:56:53 +00:00
pr29170.ll
pr29222.ll
pr30284.ll	[TargetLowering] SimplifyDemandedBits - legal checks for SIGN/ZERO_EXTEND -> ZERO/ANY_EXTEND	2019-06-25 10:51:15 +00:00
pr30290.ll
pr30430.ll
pr30511.ll
pr30562.ll
pr30813.ll
pr30821.mir	[X86] Introduce new MOVSSrm/MOVSDrm opcodes that use VR128 register class.	2019-06-18 03:23:11 +00:00
pr31045.ll
pr31088.ll
pr31143.ll
pr31242.ll
pr31271.ll
pr31323.ll
pr31593.ll
pr31773.ll
pr31956.ll
pr32108.ll
pr32241.ll
pr32256.ll
pr32278.ll
pr32282.ll
pr32284.ll
pr32329.ll
pr32340.ll
pr32345.ll
pr32368.ll
pr32420.ll
pr32451.ll
pr32484.ll
pr32515.ll
pr32588.ll
pr32610.ll
pr32659.ll
pr32907.ll
pr33010.ll
pr33290.ll
pr33349.ll
pr33396.ll
pr33715.ll
pr33747.ll
pr33828.ll
pr33954.ll
pr33960.ll
pr34080-2.ll
pr34080.ll
pr34088.ll
pr34137.ll
pr34139.ll
pr34149.ll
pr34177.ll
pr34271-1.ll
pr34271.ll
pr34292.ll
pr34381.ll
pr34397.ll
pr34421.ll
pr34592.ll
pr34605.ll
pr34629.ll
pr34634.ll
pr34653.ll
pr34657.ll
pr34855.ll
pr35272.ll
pr35316.ll
pr35399.ll
pr35443.ll
pr35636.ll
pr35761.ll
pr35763.ll
pr35765.ll
pr35918.ll
pr35972.ll
pr35982.ll
pr36199.ll
pr36274.ll
pr36312.ll
pr36553.ll
pr36602.ll
pr36865.ll
pr37063.ll
pr37264.ll
pr37359.ll
pr37499.ll
pr37820.ll
pr37826.ll
pr37879.ll
pr37916.ll
pr38038.ll
pr38185.ll	[MBP] Move a latch block with conditional exit and multi predecessors to top of loop	2019-06-14 23:08:59 +00:00
pr38217.ll
pr38533.ll
pr38539.ll
pr38639.ll
pr38738.ll
pr38743.ll
pr38762.ll
pr38763.ll
pr38795.ll
pr38803.ll
pr38819.ll
pr38865-2.ll
pr38865-3.ll
pr38865.ll
pr38952.mir
pr39098.ll
pr39187-g.ll
pr39243.ll
pr39666.ll
pr39733.ll
pr39896.ll	Rename ExpandISelPseudo->FinalizeISel, delay register reservation	2019-06-19 00:25:39 +00:00
pr39926.ll
pr40090.ll
pr40289-64bit.ll
pr40289.ll
pr40529.ll
pr40539.ll
pr40631_deadstore_elision.ll
pr40730.ll
pr40737.ll
pr40811.ll
pr40891.ll
pr40994.ll
pr41619.ll
pr41678.ll
pr41748.ll
PR34565.ll
PR37310.mir	Describe stack-id as an enum	2019-06-17 09:13:29 +00:00
PR40322.ll
pre-coalesce-2.ll
pre-coalesce.ll
pre-coalesce.mir
pre-ra-sched.ll
prefer-avx256-lzcnt.ll
prefer-avx256-mask-extend.ll
prefer-avx256-mask-shuffle.ll	[TargetLowering] SimplifyDemandedBits - legal checks for SIGN/ZERO_EXTEND -> ZERO/ANY_EXTEND	2019-06-25 10:51:15 +00:00
prefer-avx256-popcnt.ll
prefer-avx256-shift.ll
prefer-avx256-trunc.ll
prefer-avx256-wide-mul.ll
prefetch.ll
prefixdata.ll
preserve_allcc64.ll
preserve_mostcc64.ll
private-2.ll
private.ll
probe-stack-x32.ll
prolog-push-seq.ll
prologepilog_deref_size.mir	Describe stack-id as an enum	2019-06-17 09:13:29 +00:00
prologue-epilogue-remarks.mir
prologuedata.ll
promote-assert-zext.ll
promote-i16.ll
promote-trunc.ll
promote-vec3.ll
promote.ll	[X86] Regenerate promote.ll. NFC.	2019-06-18 10:10:53 +00:00
ps4-noreturn.ll
ps4-ssp-nop.ll
pseudo_cmov_lower1.ll
pseudo_cmov_lower2.ll
pseudo_cmov_lower.ll
pshufb-mask-comments.ll
pshufd-combine-crash.ll
psubus.ll	[x86] narrow extract subvector of vector select	2019-06-07 13:17:46 +00:00
ptest.ll
ptr-rotate.ll
ptrtoint-constexpr.ll
ptrtoint-narrow.ll
ptwrite32-intrinsic.ll
ptwrite64-intrinsic.ll
pull-binop-through-shift.ll
pull-conditional-binop-through-shift.ll
push-cfi-debug.ll
push-cfi-obj.ll
push-cfi.ll
ragreedy-bug.ll
ragreedy-hoist-spill.ll	[MBP] Move a latch block with conditional exit and multi predecessors to top of loop	2019-06-14 23:08:59 +00:00
ragreedy-last-chance-recoloring.ll
rd-mod-wr-eflags.ll
rdpid.ll
rdpmc.ll
rdrand-x86_64.ll
rdrand.ll
rdseed-x86_64.ll
rdseed.ll
rdtsc-upgrade.ll
rdtsc.ll
read-fp-no-frame-pointer.ll
recip-fastmath2.ll
recip-fastmath.ll
recip-pic.ll
red-zone2.ll
red-zone.ll
reduce-trunc-shl.ll
regalloc-advanced-split-cost.ll
regalloc-copy-hints.mir	Describe stack-id as an enum	2019-06-17 09:13:29 +00:00
regalloc-fast-missing-live-out-spill.mir
regalloc-reconcile-broken-hints.ll
regalloc-spill-at-ehpad.ll
regcall-no-plt.ll
reghinting.ll
regparm.ll
regpressure.ll
rem_crash.ll
rem.ll
remarks-section.ll
remat-constant.ll
remat-fold-load.ll
remat-mov-0.ll
remat-phys-dead.ll
remat-scalar-zero.ll
replace_unsupported_masked_mem_intrin.ll
replace-load-and-with-bzhi.ll
ret-addr.ll
ret-i64-0.ll
ret-mmx.ll
retpoline-external.ll
retpoline-regparm.ll
retpoline.ll
return_zeroext_i2.ll
return-ext.ll
returned-trunc-tail-calls.ll
reverse_branches.ll	[MBP] Move a latch block with conditional exit and multi predecessors to top of loop	2019-06-14 23:08:59 +00:00
rip-rel-address.ll
rip-rel-lea.ll
rodata-relocs.ll
rot16.ll
rot32.ll
rot64.ll
rotate2.ll
rotate4.ll
rotate_vec.ll
rotate-extract-vector.ll
rotate-extract.ll
rotate-multi.ll
rotate.ll
rounding-ops.ll
rrlist-livereg-corrutpion.ll
rtm.ll
sad_variations.ll
sad.ll
sadd_sat_vec.ll	[X86][AVX] isNOT - handle concat_vectors(xor X, -1, xor Y, -1) pattern	2019-06-21 10:44:15 +00:00
sadd_sat.ll
saddo-redundant-add.ll
safestack_inline.ll
safestack_ssp.ll
safestack.ll
sandybridge-loads.ll	[x86] avoid vector load narrowing with extracted store uses (PR42305)	2019-06-19 18:13:47 +00:00
sar_fold64.ll
sar_fold.ll
sat-add.ll
sbb.ll
scalar_sse_minmax.ll
scalar_widen_div.ll
scalar-extract.ll
scalar-fp-to-i64.ll	[X86] Convert f32/f64 FANDN/FAND/FOR/FXOR to vector logic ops and scalar_to_vector/extract_vector_elts to reduce isel patterns.	2019-06-10 00:41:07 +00:00
scalar-int-to-fp.ll
scalar-min-max-fill-operand.ll
scalarize-bitcast.ll
scalarize-fp.ll
scatter-schedule.ll
scavenger.mir
scev-interchange.ll
scheduler-backtracking.ll
sdiv-exact.ll
sdiv-pow2.ll
section_mergeable_size.ll
segmented-stacks-dynamic.ll
segmented-stacks-standalone.ll
segmented-stacks.ll
seh-catch-all-win32.ll
seh-catch-all.ll
seh-catchpad.ll
seh-except-finally.ll
seh-exception-code.ll
seh-filter-no-personality.ll
seh-finally.ll
seh-localaddress.ll
seh-no-invokes.ll
seh-safe-div-win32.ll
seh-safe-div.ll
seh-stack-realign.ll
select_const.ll
select_meta.ll
select-1-or-neg1.ll
select-mmx.ll
select-of-fp-constants.ll
select-with-and-or.ll
select.ll	Teach the DAGCombine to fold this pattern(c1 and c2 is constant).	2019-06-26 05:12:53 +00:00
selectcc-to-shiftand.ll
selectiondag-crash.ll
selectiondag-cse.ll
selectiondag-debug-loc.ll
selectiondag-dominator.ll
selectiondag-order.ll
setcc-combine.ll
setcc-logic.ll
setcc-lowering.ll	[TargetLowering] SimplifyDemandedBits - legal checks for SIGN/ZERO_EXTEND -> ZERO/ANY_EXTEND	2019-06-25 10:51:15 +00:00
setcc-narrowing.ll
setcc-wide-types.ll
setcc.ll
setjmp-spills.ll
setoeq.ll
setuge.ll
sext-i1.ll
sext-load.ll
sext-ret-val.ll
sext-setcc-self.ll
sext-subreg.ll
sext-trunc.ll
sha.ll
shadow-stack.ll
shift_minsize.ll
shift-amount-mod.ll	[DAGCombine][X86][AArch64][MIPS][LANAI] (C - x) - y -> C - (x + y) fold (PR41952)	2019-06-04 11:06:21 +00:00
shift-and-x86_64.ll
shift-and.ll
shift-avx2-crash.ll
shift-bmi2.ll
shift-coalesce.ll
shift-codegen.ll
shift-combine-crash.ll
shift-combine.ll
shift-double-x86_64.ll
shift-double.ll
shift-folding.ll
shift-i128.ll
shift-i256.ll
shift-mask.ll
shift-one.ll
shift-pair.ll
shift-parts.ll
shift-pcmp.ll
shl_elim.ll
shl_undef.ll
shl-anyext.ll
shl-crash-on-legalize.ll
shl-i64.ll
shrink_vmul_sse.ll
shrink_vmul-widen.ll	[x86] split 256-bit store of concatenated vectors	2019-06-04 16:40:04 +00:00
shrink_vmul.ll	[x86] split 256-bit store of concatenated vectors	2019-06-04 16:40:04 +00:00
shrink_wrap_dbg_value.mir	Describe stack-id as an enum	2019-06-17 09:13:29 +00:00
shrink-compare.ll
shrink-fp-const1.ll
shrink-fp-const2.ll
shrink-wrap-chkstk-x86_64.ll	[FIX] Forces shrink wrapping to consider any memory access as aliasing with the stack	2019-06-13 13:56:19 +00:00
shrink-wrap-chkstk.ll
shrink-wrapping-vla.ll
shrinkwrap-hang.ll
shuffle-combine-crash-2.ll
shuffle-combine-crash.ll
shuffle-extract-subvector.ll
shuffle-of-insert.ll
shuffle-of-splat-multiuses.ll
shuffle-strided-with-offset-128.ll
shuffle-strided-with-offset-256.ll
shuffle-strided-with-offset-512.ll
shuffle-vs-trunc-128-widen.ll
shuffle-vs-trunc-128.ll
shuffle-vs-trunc-256-widen.ll
shuffle-vs-trunc-256.ll
shuffle-vs-trunc-512-widen.ll	[X86] Turn v16i16->v16i8 truncate+store into a any_extend+truncstore if we avx512f, but not avx512bw.	2019-06-23 23:51:21 +00:00
shuffle-vs-trunc-512.ll	[X86] Turn v16i16->v16i8 truncate+store into a any_extend+truncstore if we avx512f, but not avx512bw.	2019-06-23 23:51:21 +00:00
sibcall-2.ll
sibcall-3.ll
sibcall-4.ll
sibcall-5.ll
sibcall-6.ll
sibcall-byval.ll
sibcall-win64.ll
sibcall.ll	[Peephole] Allow folding loads into instructions w/multiple uses (such as test64rr)	2019-06-25 17:29:18 +00:00
signbit-shift.ll
signed-truncation-check.ll
simple-register-allocation-read-undef.mir
simple-zext.ll
sincos-opt.ll
sincos.ll
sink-addsub-of-const.ll	[DAGCombine][X86][AArch64][MIPS][LANAI] (C - x) - y -> C - (x + y) fold (PR41952)	2019-06-04 11:06:21 +00:00
sink-blockfreq.ll
sink-cheap-instructions.ll
sink-gep-before-mem-inst.ll
sink-hoist.ll
sink-local-value.ll
sink-out-of-loop.ll
sitofp.ll
sjlj-baseptr.ll
sjlj-eh.ll
sjlj-shadow-stack-liveness.mir	Rename ExpandISelPseudo->FinalizeISel, delay register reservation	2019-06-19 00:25:39 +00:00
sjlj.ll
slow-incdec.ll
slow-pmulld.ll
slow-unaligned-mem.ll
small-byval-memcpy.ll
smul_fix_sat_constants.ll
smul_fix_sat.ll
smul_fix.ll
smul-with-overflow.ll
soft-fp-legal-in-HW-reg.ll
soft-fp.ll
soft-sitofp.ll
speculative-load-hardening-call-and-ret.ll
speculative-load-hardening-gather.ll
speculative-load-hardening-indirect.ll
speculative-load-hardening.ll	[MBP] Move a latch block with conditional exit and multi predecessors to top of loop	2019-06-14 23:08:59 +00:00
splat-const.ll
splat-for-size.ll
split-eh-lpad-edges.ll
split-extend-vector-inreg.ll
split-store.ll
split-vector-bitcast.ll
split-vector-rem.ll
sqrt-fastmath-mir.ll	Rename ExpandISelPseudo->FinalizeISel, delay register reservation	2019-06-19 00:25:39 +00:00
sqrt-fastmath-tune.ll
sqrt-fastmath.ll
sqrt-partial.ll
sqrt.ll
sret-implicit.ll
sse1-fcopysign.ll
sse1.ll
sse2-intrinsics-canonical.ll
sse2-intrinsics-fast-isel-x86_64.ll
sse2-intrinsics-fast-isel.ll
sse2-intrinsics-x86_64-upgrade.ll
sse2-intrinsics-x86_64.ll
sse2-intrinsics-x86-upgrade.ll
sse2-intrinsics-x86.ll
sse2-vector-shifts.ll
sse2.ll
sse3-avx-addsub-2.ll
sse3-avx-addsub.ll
sse3-intrinsics-fast-isel.ll
sse3-intrinsics-x86.ll
sse3.ll
sse4a-intrinsics-fast-isel.ll
sse4a-upgrade.ll
sse4a.ll
sse41-intrinsics-fast-isel.ll
sse41-intrinsics-x86-upgrade.ll
sse41-intrinsics-x86.ll
sse41-pmovxrm.ll
sse41.ll
sse42-intrinsics-fast-isel-x86_64.ll
sse42-intrinsics-fast-isel.ll
sse42-intrinsics-x86_64.ll
sse42-intrinsics-x86.ll
sse_partial_update.ll
sse_reload_fold.ll
sse-align-0.ll
sse-align-1.ll
sse-align-2.ll
sse-align-3.ll
sse-align-4.ll
sse-align-5.ll
sse-align-6.ll
sse-align-7.ll
sse-align-8.ll
sse-align-9.ll
sse-align-10.ll
sse-align-11.ll
sse-align-12.ll
sse-commute.ll
sse-cvttp2si.ll
sse-domains.ll
sse-fcopysign.ll
sse-fsignum.ll
sse-intel-ocl.ll
sse-intrinsics-fast-isel-x86_64.ll
sse-intrinsics-fast-isel.ll
sse-intrinsics-x86_64-upgrade.ll
sse-intrinsics-x86_64.ll
sse-intrinsics-x86-upgrade.ll
sse-intrinsics-x86.ll
sse-load-ret.ll
sse-minmax.ll
sse-only.ll
sse-regcall.ll
sse-scalar-fp-arith-unary.ll
sse-scalar-fp-arith.ll	[X86] Add load folding isel patterns to scalar_math_patterns and AVX512_scalar_math_fp_patterns.	2019-06-11 04:30:53 +00:00
sse-unaligned-mem-feature.ll
sse-varargs.ll
ssp-data-layout.ll
ssp-guard-spill.ll
ssse3-intrinsics-fast-isel.ll
ssse3-intrinsics-x86.ll
ssub_sat_vec.ll	[X86][AVX] isNOT - handle concat_vectors(xor X, -1, xor Y, -1) pattern	2019-06-21 10:44:15 +00:00
ssub_sat.ll
stack_guard_remat.ll
stack-align2.ll
stack-align-memcpy.ll
stack-align.ll
stack-folding-3dnow.ll
stack-folding-adx-x86_64.ll
stack-folding-adx.mir
stack-folding-avx512bf16.ll	[X86] Add AVX512BF16 and AVX512VP2INTERSECT instructions to the loading folding tables.	2019-06-01 06:20:59 +00:00
stack-folding-avx512vp2intersect.ll	[X86] Add AVX512BF16 and AVX512VP2INTERSECT instructions to the loading folding tables.	2019-06-01 06:20:59 +00:00
stack-folding-bmi2.ll
stack-folding-bmi2.mir
stack-folding-bmi.ll
stack-folding-fp-avx1.ll
stack-folding-fp-avx512.ll	[X86] Make a bunch of merge masked binops commutable for loading folding.	2019-06-06 21:00:04 +00:00
stack-folding-fp-avx512vl.ll
stack-folding-fp-sse42.ll
stack-folding-int-avx1.ll
stack-folding-int-avx2.ll
stack-folding-int-avx512.ll	[X86] Make a bunch of merge masked binops commutable for loading folding.	2019-06-06 21:00:04 +00:00
stack-folding-int-avx512vl.ll
stack-folding-int-sse42.ll
stack-folding-lwp.ll
stack-folding-mmx.ll
stack-folding-sha.ll
stack-folding-tbm.ll
stack-folding-x86_64.ll
stack-folding-xop.ll
stack-probe-red-zone.ll
stack-probe-size.ll
stack-probes.ll
stack-protector-dbginfo.ll
stack-protector-msvc.ll
stack-protector-remarks.ll
stack-protector-target.ll
stack-protector-vreg-to-vreg-copy.ll
stack-protector-weight.ll	Rename ExpandISelPseudo->FinalizeISel, delay register reservation	2019-06-19 00:25:39 +00:00
stack-protector.ll	StackProtector: Use PointerMayBeCaptured	2019-06-12 14:23:33 +00:00
stack-size-section-function-sections.ll
stack-size-section.ll
stack-update-frame-opcode.ll
StackColoring-dbg.ll
StackColoring.ll
stackguard-internal.ll
stackmap-fast-isel.ll
stackmap-frame-setup.ll
stackmap-large-constants.ll
stackmap-large-location-size.ll
stackmap-liveness.ll
stackmap-nops.ll
stackmap-shadow-optimization.ll
stackmap.ll
stackpointer.ll
statepoint-allocas.ll
statepoint-call-lowering.ll
statepoint-far-call.ll
statepoint-forward.ll
statepoint-gctransition-call-lowering.ll
statepoint-invoke.ll
statepoint-live-in.ll
statepoint-stack-usage.ll
statepoint-stackmap-format.ll
statepoint-uniqueing.ll
statepoint-vector-bad-spill.ll
statepoint-vector.ll
stdarg.ll
stdcall-notailcall.ll
stdcall.ll
store_op_load_fold2.ll
store_op_load_fold.ll
store-empty-member.ll
store-fp-constant.ll
store-global-address.ll
store-narrow.ll
store-zero-and-minus-one.ll
stores-merging.ll
storetrunc-fp.ll
stride-nine-with-base-reg.ll
stride-reuse.ll
sttni.ll
sub-with-overflow.ll
sub.ll
subcarry.ll
subreg-to-reg-0.ll
subreg-to-reg-1.ll
subreg-to-reg-2.ll
subreg-to-reg-3.ll
subreg-to-reg-4.ll
subreg-to-reg-6.ll
subvector-broadcast.ll	[x86] split 256-bit store of concatenated vectors	2019-06-04 16:40:04 +00:00
sunkaddr-ext.ll
swap.ll
swift-error.ll
swift-return.ll
swiftcc.ll
swifterror.ll	[MBP] Move a latch block with conditional exit and multi predecessors to top of loop	2019-06-14 23:08:59 +00:00
swiftself.ll	[FastISel] Skip creating unnecessary vregs for arguments	2019-06-10 16:53:37 +00:00
switch-bt.ll
switch-crit-edge-constant.ll
switch-default-only.ll
switch-density.ll
switch-edge-weight.ll	Rename ExpandISelPseudo->FinalizeISel, delay register reservation	2019-06-19 00:25:39 +00:00
switch-jump-table.ll	Rename ExpandISelPseudo->FinalizeISel, delay register reservation	2019-06-19 00:25:39 +00:00
switch-lower-peel-top-case.ll	Rename ExpandISelPseudo->FinalizeISel, delay register reservation	2019-06-19 00:25:39 +00:00
switch-or.ll
switch-order-weight.ll
switch-zextload.ll
switch.ll	[test] Change comment wording (NFC)	2019-06-18 23:31:10 +00:00
SwitchLowering.ll
swizzle-2.ll
swizzle-avx2.ll
SwizzleShuff.ll
system-intrinsics-64-xsave.ll
system-intrinsics-64-xsavec.ll
system-intrinsics-64-xsaveopt.ll
system-intrinsics-64-xsaves.ll
system-intrinsics-64.ll
system-intrinsics-xgetbv.ll
system-intrinsics-xsave.ll
system-intrinsics-xsavec.ll
system-intrinsics-xsaveopt.ll
system-intrinsics-xsaves.ll
system-intrinsics-xsetbv.ll
system-intrinsics.ll
tail-call-attrs.ll
tail-call-casts.ll
tail-call-conditional.mir
tail-call-got.ll
tail-call-legality.ll
tail-call-mutable-memarg.ll
tail-call-parameter-attrs-mismatch.ll
tail-call-win64.ll
tail-dup-addr.ll
tail-dup-catchret.ll
tail-dup-debugloc.ll
tail-dup-merge-loop-headers.ll	[MBP] Move a latch block with conditional exit and multi predecessors to top of loop	2019-06-14 23:08:59 +00:00
tail-dup-no-other-successor.ll
tail-dup-repeat.ll	[MBP] Move a latch block with conditional exit and multi predecessors to top of loop	2019-06-14 23:08:59 +00:00
tail-merge-after-mbp.mir	[Codegen] Merge tail blocks with no successors after block placement	2019-06-13 18:11:32 +00:00
tail-merge-debugloc.ll
tail-merge-identical.ll
tail-merge-unreachable.ll
tail-merge-wineh.ll
tail-opts.ll	[Codegen] Merge tail blocks with no successors after block placement	2019-06-13 18:11:32 +00:00
tail-threshold.ll	[Codegen] Merge tail blocks with no successors after block placement	2019-06-13 18:11:32 +00:00
tailcall-64.ll
tailcall-calleesave.ll
tailcall-cgp-dup.ll
tailcall-disable.ll
tailcall-fastisel.ll
tailcall-largecode.ll
tailcall-lifetime-end.ll
tailcall-mem-intrinsics.ll
tailcall-msvc-conventions.ll
tailcall-multiret.ll
tailcall-pseudo-64.mir
tailcall-pseudo.mir
tailcall-readnone.ll
tailcall-returndup-void.ll
tailcall-ri64.ll
tailcall-stackalign.ll
tailcall-structret.ll
tailcall.ll
tailcallbyval64.ll
tailcallbyval.ll
tailcallfp2.ll
tailcallfp.ll
tailcallpic1.ll
tailcallpic2.ll
tailcallpic3.ll
tailcallstack64.ll
taildup-crash.ll
tailjmp_gotpcrel_relax_relocation.ll
targetLoweringGeneric.ll
tbm_patterns.ll
tbm-intrinsics-fast-isel-x86_64.ll
tbm-intrinsics-fast-isel.ll
tbm-intrinsics-x86_64.ll
tbm-intrinsics.ll
test_x86condbr_globaladdr.mir
test-nofold.ll
test-shrink-bug.ll	[Codegen] Merge tail blocks with no successors after block placement	2019-06-13 18:11:32 +00:00
test-shrink.ll
test-vs-bittest.ll
testb-je-fusion.ll
testl-commute.ll
this-return-64.ll
throws-cfi-fp.ll
throws-cfi-no-fp.ll
tls-addr-non-leaf-function.ll
tls-android-negative.ll
tls-android.ll
tls-local-dynamic.ll
tls-models.ll
tls-no-plt.ll
tls-pic.ll
tls-pie.ll
tls-shrink-wrapping.ll
tls-windows-itanium.ll
tls.ll
tlv-1.ll
tlv-2.ll
tlv-3.ll
token_landingpad.ll
trap.ll
tree_way_unsigned_cmp.ll	[NFC] Added test from PR19758	2019-06-09 15:12:46 +00:00
trunc-and.ll
trunc-ext-ld-st.ll
trunc-store.ll
trunc-subvector.ll
trunc-to-bool.ll
TruncAssertSext.ll
TruncAssertZext.ll
twoaddr-coalesce-2.ll
twoaddr-coalesce-3.ll
twoaddr-coalesce.ll
twoaddr-dbg-value.mir
twoaddr-lea.ll
twoaddr-pass-sink.ll
twoaddr-sink-terminator.ll
uadd_sat_vec.ll	[x86] narrow extract subvector of vector select	2019-06-07 13:17:46 +00:00
uadd_sat.ll
uint64-to-float.ll
uint_to_fp-2.ll
uint_to_fp-3.ll
uint_to_fp.ll
umul_fix.ll
umul-with-carry.ll
umul-with-overflow.ll
umulo-64-legalisation-lowering.ll
umulo-128-legalisation-lowering.ll
unaligned-32-byte-memops.ll
unaligned-load.ll
unaligned-spill-folding.ll
undef-eflags.mir
undef-globals-bss.ll
undef-label.ll
undef-ops.ll
unfold-masked-merge-scalar-constmask-innerouter.ll
unfold-masked-merge-scalar-constmask-interleavedbits.ll
unfold-masked-merge-scalar-constmask-interleavedbytehalves.ll
unfold-masked-merge-scalar-constmask-lowhigh.ll
unfold-masked-merge-scalar-variablemask.ll
unfold-masked-merge-vector-variablemask-const.ll
unfold-masked-merge-vector-variablemask.ll
unknown-location.ll
unreachable-loop-sinking.ll
unreachable-mbb-undef-phi.mir
unreachable-trap.ll
unreachableblockelim.ll
unused_stackslots.ll
unwind-init.ll
unwindraise.ll
update-terminator-debugloc.ll
update-terminator.mir
urem-i8-constant.ll
urem-power-of-two.ll
urem-seteq-optsize.ll
urem-seteq-vec-nonsplat.ll
urem-seteq-vec-splat.ll
urem-seteq.ll
use-add-flags.ll
usub_sat_vec.ll	[x86] narrow extract subvector of vector select	2019-06-07 13:17:46 +00:00
usub_sat.ll
utf8.ll
utf16-cfstrings.ll
uwtables.ll
v2f32.ll
v4f32-immediate.ll
v4i32load-crash.ll
v8i1-masks.ll
vaargs.ll
vaes-intrinsics-avx512-x86.ll
vaes-intrinsics-avx512vl-x86.ll
vaes-intrinsics-avx-x86.ll
var-permute-128.ll	[X86][SSE] Fold extract_subvector(vselect(x,y,z),0) -> vselect(extract_subvector(x,0),extract_subvector(y,0),extract_subvector(z,0))	2019-06-22 17:57:01 +00:00
var-permute-256.ll	[X86][SSE] Fold extract_subvector(vselect(x,y,z),0) -> vselect(extract_subvector(x,0),extract_subvector(y,0),extract_subvector(z,0))	2019-06-22 17:57:01 +00:00
var-permute-512.ll
vararg_no_start.ll
vararg_tailcall.ll
vararg-callee-cleanup.ll
variable-sized-darwin-bzero.ll
variadic-node-pic.ll
vastart-defs-eflags.ll
vbinop-simplify-bug.ll
vec3.ll
vec_align_i256.ll
vec_align.ll
vec_anyext.ll
vec_call.ll
vec_cast2.ll
vec_cast3.ll
vec_cast.ll
vec_clz.ll	[CodeGen] Add missing vector type legalization for ctlz_zero_undef	2019-06-24 19:27:07 +00:00
vec_cmp_sint-128.ll
vec_cmp_uint-128.ll
vec_compare-sse4.ll
vec_compare.ll
vec_ctbits.ll
vec_ext_inreg.ll
vec_extract-avx.ll	[X86] Add DAG combine to turn (vzmovl (insert_subvector undef, X, 0)) into (insert_subvector allzeros, (vzmovl X), 0)	2019-06-21 19:10:21 +00:00
vec_extract-mmx.ll
vec_extract-sse4.ll
vec_extract.ll
vec_fabs.ll
vec_floor.ll
vec_fneg.ll	Revert "[NFC][CodeGen] Add unary FNeg tests to some X86/ and XCore/ tests."	2019-06-13 19:24:51 +00:00
vec_fp_to_int-widen.ll	[SelectionDAG] Add fpto[us]i(undef) --> undef constant fold	2019-06-04 10:04:55 +00:00
vec_fp_to_int.ll	[SelectionDAG] Add fpto[us]i(undef) --> undef constant fold	2019-06-04 10:04:55 +00:00
vec_fpext.ll	[X86] Remove avx512 isel patterns for fpextend+load. Prefer to only match fp extloads instead.	2019-05-31 06:21:53 +00:00
vec_fptrunc.ll	[x86] split 256-bit store of concatenated vectors	2019-06-04 16:40:04 +00:00
vec_i64.ll
vec_ins_extract-1.ll
vec_ins_extract.ll
vec_insert-2.ll
vec_insert-3.ll
vec_insert-4.ll
vec_insert-5.ll
vec_insert-7.ll
vec_insert-8.ll
vec_insert-9.ll
vec_insert-mmx.ll
vec_int_to_fp-widen.ll	[SelectionDAG] Add [us]itofp(undef) --> 0 constant fold (PR39205)	2019-06-03 13:02:07 +00:00
vec_int_to_fp.ll	[SelectionDAG] Add [us]itofp(undef) --> 0 constant fold (PR39205)	2019-06-03 13:02:07 +00:00
vec_loadsingles.ll
vec_logical.ll	Revert "[NFC][CodeGen] Add unary FNeg tests to some X86/ and XCore/ tests."	2019-06-13 19:24:51 +00:00
vec_minmax_match.ll
vec_minmax_sint.ll
vec_minmax_uint.ll
vec_partial.ll
vec_reassociate.ll
vec_return.ll
vec_round.ll
vec_saddo.ll	[X86] X86ISD::ANDNP is a (non-commutative) binop	2019-06-21 12:42:39 +00:00
vec_sdiv_to_shift.ll
vec_set-2.ll
vec_set-3.ll
vec_set-4.ll
vec_set-6.ll
vec_set-7.ll
vec_set-8.ll
vec_set-A.ll
vec_set-B.ll
vec_set-C.ll
vec_set-D.ll
vec_set-F.ll
vec_set-H.ll
vec_set.ll
vec_setcc-2.ll
vec_setcc.ll
vec_shift2.ll
vec_shift3.ll
vec_shift4.ll
vec_shift5.ll
vec_shift6.ll
vec_shift7.ll
vec_shift.ll
vec_shuf-insert.ll
vec_smulo.ll	[x86] split 256-bit store of concatenated vectors	2019-06-04 16:40:04 +00:00
vec_split.ll
vec_ss_load_fold.ll
vec_ssubo.ll	[X86] X86ISD::ANDNP is a (non-commutative) binop	2019-06-21 12:42:39 +00:00
vec_trunc_sext.ll
vec_uaddo.ll	[x86] split 256-bit store of concatenated vectors	2019-06-04 16:40:04 +00:00
vec_udiv_to_shift.ll
vec_uint_to_fp-fastmath.ll
vec_uint_to_fp.ll
vec_umulo.ll	[x86] split 256-bit store of concatenated vectors	2019-06-04 16:40:04 +00:00
vec_unsafe-fp-math.ll
vec_usubo.ll	[x86] split 256-bit store of concatenated vectors	2019-06-04 16:40:04 +00:00
vec_zero_cse.ll
vec_zero-2.ll
vec_zero.ll
vec-copysign-avx512.ll
vec-copysign.ll
vec-libcalls.ll
vec-loadsingles-alignment.ll
vec-trunc-store.ll
vecloadextract.ll	Rename ExpandISelPseudo->FinalizeISel, delay register reservation	2019-06-19 00:25:39 +00:00
vector_splat-const-shift-of-constmasked.ll
vector-bitreverse.ll
vector-blend.ll
vector-compare-all_of.ll
vector-compare-any_of.ll
vector-compare-combines.ll
vector-compare-results.ll
vector-compare-simplify.ll
vector-constrained-fp-intrinsics-fma.ll
vector-constrained-fp-intrinsics.ll
vector-ext-logic.ll
vector-extend-inreg.ll	[X86] Use vmovq for v4i64/v4f64/v8i64/v8f64 vzmovl.	2019-06-21 17:24:21 +00:00
vector-fshl-128.ll
vector-fshl-256.ll
vector-fshl-512.ll
vector-fshl-rot-128.ll
vector-fshl-rot-256.ll
vector-fshl-rot-512.ll
vector-fshr-128.ll
vector-fshr-256.ll
vector-fshr-512.ll
vector-fshr-rot-128.ll
vector-fshr-rot-256.ll
vector-fshr-rot-512.ll
vector-gep.ll	[x86] split 256-bit store of concatenated vectors	2019-06-04 16:40:04 +00:00
vector-half-conversions.ll
vector-idiv-sdiv-128.ll
vector-idiv-sdiv-256.ll
vector-idiv-sdiv-512.ll
vector-idiv-udiv-128.ll
vector-idiv-udiv-256.ll
vector-idiv-udiv-512.ll
vector-idiv-v2i32.ll
vector-idiv.ll
vector-interleave.ll
vector-intrinsics.ll
vector-lzcnt-128.ll
vector-lzcnt-256.ll
vector-lzcnt-512.ll
vector-merge-store-fp-constants.ll
vector-mul.ll
vector-narrow-binop.ll
vector-partial-undef.ll
vector-pcmp.ll
vector-popcnt-128.ll
vector-popcnt-256.ll
vector-popcnt-512.ll
vector-reduce-add-widen.ll	Improve reduction intrinsics by overloading result value.	2019-06-13 09:37:38 +00:00
vector-reduce-add.ll	Improve reduction intrinsics by overloading result value.	2019-06-13 09:37:38 +00:00
vector-reduce-and-bool.ll	[TargetLowering] SimplifyDemandedBits - legal checks for SIGN/ZERO_EXTEND -> ZERO/ANY_EXTEND	2019-06-25 10:51:15 +00:00
vector-reduce-and-widen.ll	Improve reduction intrinsics by overloading result value.	2019-06-13 09:37:38 +00:00
vector-reduce-and.ll	Improve reduction intrinsics by overloading result value.	2019-06-13 09:37:38 +00:00
vector-reduce-fadd-fast.ll	[X86] Regenerate fast fadd reduction tests. NFCI	2019-06-24 16:25:30 +00:00
vector-reduce-fadd.ll	Change semantics of fadd/fmul vector reductions.	2019-06-11 08:22:10 +00:00
vector-reduce-fmax-nnan.ll	Improve reduction intrinsics by overloading result value.	2019-06-13 09:37:38 +00:00
vector-reduce-fmax.ll	Improve reduction intrinsics by overloading result value.	2019-06-13 09:37:38 +00:00
vector-reduce-fmin-nnan.ll	Improve reduction intrinsics by overloading result value.	2019-06-13 09:37:38 +00:00
vector-reduce-fmin.ll	Improve reduction intrinsics by overloading result value.	2019-06-13 09:37:38 +00:00
vector-reduce-fmul-fast.ll	Change semantics of fadd/fmul vector reductions.	2019-06-11 08:22:10 +00:00
vector-reduce-fmul.ll	Change semantics of fadd/fmul vector reductions.	2019-06-11 08:22:10 +00:00
vector-reduce-mul-widen.ll	Revert r363802, r363850, and r363856 "[TargetLowering] SimplifyDemandedBits..."	2019-06-25 01:32:42 +00:00
vector-reduce-mul.ll	Revert r363802, r363850, and r363856 "[TargetLowering] SimplifyDemandedBits..."	2019-06-25 01:32:42 +00:00
vector-reduce-or-bool.ll	[TargetLowering] SimplifyDemandedBits - legal checks for SIGN/ZERO_EXTEND -> ZERO/ANY_EXTEND	2019-06-25 10:51:15 +00:00
vector-reduce-or-widen.ll	Improve reduction intrinsics by overloading result value.	2019-06-13 09:37:38 +00:00
vector-reduce-or.ll	Improve reduction intrinsics by overloading result value.	2019-06-13 09:37:38 +00:00
vector-reduce-smax-widen.ll	[X86][SSE] Fold extract_subvector(vselect(x,y,z),0) -> vselect(extract_subvector(x,0),extract_subvector(y,0),extract_subvector(z,0))	2019-06-22 17:57:01 +00:00
vector-reduce-smax.ll	[X86][SSE] Fold extract_subvector(vselect(x,y,z),0) -> vselect(extract_subvector(x,0),extract_subvector(y,0),extract_subvector(z,0))	2019-06-22 17:57:01 +00:00
vector-reduce-smin-widen.ll	[X86][SSE] Fold extract_subvector(vselect(x,y,z),0) -> vselect(extract_subvector(x,0),extract_subvector(y,0),extract_subvector(z,0))	2019-06-22 17:57:01 +00:00
vector-reduce-smin.ll	[X86][SSE] Fold extract_subvector(vselect(x,y,z),0) -> vselect(extract_subvector(x,0),extract_subvector(y,0),extract_subvector(z,0))	2019-06-22 17:57:01 +00:00
vector-reduce-umax-widen.ll	[X86][SSE] Fold extract_subvector(vselect(x,y,z),0) -> vselect(extract_subvector(x,0),extract_subvector(y,0),extract_subvector(z,0))	2019-06-22 17:57:01 +00:00
vector-reduce-umax.ll	[X86][SSE] Fold extract_subvector(vselect(x,y,z),0) -> vselect(extract_subvector(x,0),extract_subvector(y,0),extract_subvector(z,0))	2019-06-22 17:57:01 +00:00
vector-reduce-umin-widen.ll	[X86][SSE] Fold extract_subvector(vselect(x,y,z),0) -> vselect(extract_subvector(x,0),extract_subvector(y,0),extract_subvector(z,0))	2019-06-22 17:57:01 +00:00
vector-reduce-umin.ll	[X86][SSE] Fold extract_subvector(vselect(x,y,z),0) -> vselect(extract_subvector(x,0),extract_subvector(y,0),extract_subvector(z,0))	2019-06-22 17:57:01 +00:00
vector-reduce-xor-bool.ll	[TargetLowering] SimplifyDemandedBits - legal checks for SIGN/ZERO_EXTEND -> ZERO/ANY_EXTEND	2019-06-25 10:51:15 +00:00
vector-reduce-xor-widen.ll	Improve reduction intrinsics by overloading result value.	2019-06-13 09:37:38 +00:00
vector-reduce-xor.ll	Improve reduction intrinsics by overloading result value.	2019-06-13 09:37:38 +00:00
vector-rem.ll
vector-rotate-128.ll
vector-rotate-256.ll
vector-rotate-512.ll
vector-sext-widen.ll
vector-sext.ll
vector-shift-ashr-128.ll
vector-shift-ashr-256.ll
vector-shift-ashr-512.ll
vector-shift-ashr-sub128-widen.ll
vector-shift-ashr-sub128.ll
vector-shift-by-select-loop.ll	[CodeGenPrepare][x86] shift both sides of a vector select when profitable	2019-06-16 15:29:03 +00:00
vector-shift-lshr-128.ll	[CodeGenPrepare][x86] shift both sides of a vector select when profitable	2019-06-16 15:29:03 +00:00
vector-shift-lshr-256.ll
vector-shift-lshr-512.ll
vector-shift-lshr-sub128-widen.ll
vector-shift-lshr-sub128.ll
vector-shift-shl-128.ll	[x86] move vector shift tests for PR37428; NFC	2019-06-14 15:23:09 +00:00
vector-shift-shl-256.ll
vector-shift-shl-512.ll
vector-shift-shl-sub128-widen.ll
vector-shift-shl-sub128.ll
vector-shuffle-128-unpck.ll
vector-shuffle-128-v2.ll
vector-shuffle-128-v4.ll
vector-shuffle-128-v8.ll
vector-shuffle-128-v16.ll
vector-shuffle-256-v4.ll	[X86] Add DAG combine to turn (vzmovl (insert_subvector undef, X, 0)) into (insert_subvector allzeros, (vzmovl X), 0)	2019-06-21 19:10:21 +00:00
vector-shuffle-256-v8.ll	[X86][AVX] Combine INSERT_SUBVECTOR(SRC0, EXTRACT_SUBVECTOR(SRC1)) as shuffle	2019-06-21 18:35:04 +00:00
vector-shuffle-256-v16.ll	[X86][AVX] Fold concat(vpermilps(x,c),vpermilps(y,c)) -> vpermilps(concat(x,y),c)	2019-06-12 16:38:20 +00:00
vector-shuffle-256-v32.ll	[X86][AVX] combineX86ShuffleChain - combine shuffle(extractsubvector(x),extractsubvector(y))	2019-06-05 12:56:53 +00:00
vector-shuffle-512-v8.ll	[TargetLowering] SimplifyDemandedBits - legal checks for SIGN/ZERO_EXTEND -> ZERO/ANY_EXTEND	2019-06-25 10:51:15 +00:00
vector-shuffle-512-v16.ll	[TargetLowering] SimplifyDemandedBits - legal checks for SIGN/ZERO_EXTEND -> ZERO/ANY_EXTEND	2019-06-25 10:51:15 +00:00
vector-shuffle-512-v32.ll
vector-shuffle-512-v64.ll
vector-shuffle-avx512.ll
vector-shuffle-combining-avx2.ll	[X86] Use vmovq for v4i64/v4f64/v8i64/v8f64 vzmovl.	2019-06-21 17:24:21 +00:00
vector-shuffle-combining-avx512bw.ll	[X86][AVX] Decode constant bits from insert_subvector(c1, c2, c3)	2019-06-15 17:05:24 +00:00
vector-shuffle-combining-avx512bwvl.ll
vector-shuffle-combining-avx512vbmi.ll
vector-shuffle-combining-avx.ll	[X86][AVX] Decode constant bits from insert_subvector(c1, c2, c3)	2019-06-15 17:05:24 +00:00
vector-shuffle-combining-sse4a.ll
vector-shuffle-combining-sse41.ll
vector-shuffle-combining-ssse3.ll
vector-shuffle-combining-xop.ll	[X86][AVX] Decode constant bits from insert_subvector(c1, c2, c3)	2019-06-15 17:05:24 +00:00
vector-shuffle-combining.ll
vector-shuffle-masked.ll
vector-shuffle-mmx.ll
vector-shuffle-sse1.ll
vector-shuffle-sse4a.ll
vector-shuffle-sse41.ll
vector-shuffle-v1.ll	[TargetLowering] SimplifyDemandedBits - legal checks for SIGN/ZERO_EXTEND -> ZERO/ANY_EXTEND	2019-06-25 10:51:15 +00:00
vector-shuffle-v48.ll
vector-shuffle-variable-128.ll
vector-shuffle-variable-256.ll
vector-sqrt.ll
vector-trunc-math-widen.ll
vector-trunc-math.ll
vector-trunc-packus-widen.ll	[x86] narrow extract subvector of vector select	2019-06-07 13:17:46 +00:00
vector-trunc-packus.ll	[x86] narrow extract subvector of vector select	2019-06-07 13:17:46 +00:00
vector-trunc-ssat-widen.ll	[x86] narrow extract subvector of vector select	2019-06-07 13:17:46 +00:00
vector-trunc-ssat.ll	[x86] narrow extract subvector of vector select	2019-06-07 13:17:46 +00:00
vector-trunc-usat-widen.ll	[x86] narrow extract subvector of vector select	2019-06-07 13:17:46 +00:00
vector-trunc-usat.ll	[x86] narrow extract subvector of vector select	2019-06-07 13:17:46 +00:00
vector-trunc-widen.ll	[X86] Turn v16i16->v16i8 truncate+store into a any_extend+truncstore if we avx512f, but not avx512bw.	2019-06-23 23:51:21 +00:00
vector-trunc.ll	[X86] Turn v16i16->v16i8 truncate+store into a any_extend+truncstore if we avx512f, but not avx512bw.	2019-06-23 23:51:21 +00:00
vector-truncate-combine.ll
vector-tzcnt-128.ll
vector-tzcnt-256.ll
vector-tzcnt-512.ll
vector-unsigned-cmp.ll
vector-variable-idx2.ll
vector-variable-idx.ll
vector-width-store-merge.ll
vector-zext-widen.ll
vector-zext.ll
vector-zmov.ll	[X86] Add a DAG combine to turn vzmovl+load into vzload if the load isn't volatile. Remove isel patterns for vzmovl+load	2019-06-25 17:08:26 +00:00
vector.ll
vectorcall.ll
version_directive.ll
vfcmp.ll
viabs.ll
virtreg-physreg-def-regallocfast.mir
virtual-registers-cleared-in-machine-functions-liveins.ll
visibility2.ll
visibility.ll
vmaskmov-offset.ll	Rename ExpandISelPseudo->FinalizeISel, delay register reservation	2019-06-19 00:25:39 +00:00
vmovq.ll
volatile.ll
vortex-bug.ll
vp2intersect_multiple_pairs.ll
vpshufbitqbm-intrinsics-upgrade.ll
vpshufbitqbm-intrinsics.ll
vsel-cmp-load.ll
vselect-2.ll
vselect-avx.ll	[x86] split 256-bit vector selects if operands are vector concats	2019-06-16 14:04:49 +00:00
vselect-constants.ll
vselect-minmax.ll
vselect-packss.ll
vselect-pcmp.ll
vselect-zero.ll
vselect.ll	[TargetLowering] SimplifyDemandedBits - add ANY_EXTEND_VECTOR_INREG support	2019-06-25 13:25:57 +00:00
vshift_scalar.ll
vshift_split2.ll
vshift_split.ll
vshift-1.ll
vshift-2.ll
vshift-3.ll
vshift-4.ll
vshift-5.ll
vshift-6.ll
vsplit-and.ll
vzero-excess.ll
waitpkg-intrinsics.ll
warn-stack.ll
wbinvd-intrinsic.ll
wbnoinvd-intrinsic.ll
weak_def_can_be_hidden.ll
weak-undef.ll
weak.ll
webkit-jscc.ll
wide-fma-contraction.ll
wide-integer-cmp.ll
wide-integer-fold.ll
widen_arith-1.ll	[MBP] Move a latch block with conditional exit and multi predecessors to top of loop	2019-06-14 23:08:59 +00:00
widen_arith-2.ll	[MBP] Move a latch block with conditional exit and multi predecessors to top of loop	2019-06-14 23:08:59 +00:00
widen_arith-3.ll	[MBP] Move a latch block with conditional exit and multi predecessors to top of loop	2019-06-14 23:08:59 +00:00
widen_arith-4.ll	[MBP] Move a latch block with conditional exit and multi predecessors to top of loop	2019-06-14 23:08:59 +00:00
widen_arith-5.ll	[MBP] Move a latch block with conditional exit and multi predecessors to top of loop	2019-06-14 23:08:59 +00:00
widen_arith-6.ll	[MBP] Move a latch block with conditional exit and multi predecessors to top of loop	2019-06-14 23:08:59 +00:00
widen_bitops-0.ll
widen_bitops-1.ll
widen_cast-1.ll
widen_cast-2.ll
widen_cast-3.ll
widen_cast-4.ll	[MBP] Move a latch block with conditional exit and multi predecessors to top of loop	2019-06-14 23:08:59 +00:00
widen_cast-5.ll
widen_cast-6.ll
widen_compare-1.ll
widen_conv-1.ll
widen_conv-2.ll
widen_conv-3.ll
widen_conv-4.ll
widen_conversions.ll
widen_extract-1.ll
widen_load-0.ll
widen_load-1.ll
widen_load-2.ll
widen_load-3.ll	[x86] avoid vector load narrowing with extracted store uses (PR42305)	2019-06-19 18:13:47 +00:00
widen_mul.ll
widen_shuffle-1.ll
WidenArith.ll
widened-broadcast.ll
win32_sret.ll
win32-bool.ll
win32-eh-available-externally.ll
win32-eh-states.ll
win32-eh.ll
win32-pic-jumptable.ll
win32-preemption.ll
win32-seh-catchpad-realign.ll
win32-seh-catchpad.ll
win32-seh-nested-finally.ll
win32-spill-xmm.ll
win32-ssp.ll
win64_alloca_dynalloca.ll
win64_call_epi.ll
win64_eh_leaf2.ll
win64_eh_leaf.ll
win64_eh.ll
win64_frame.ll
win64_nonvol.ll
win64_params.ll
win64_sibcall.ll
win64_vararg.ll
win64-bool.ll
win64-byval.ll
win64-jumptable.ll
win64-long-double.ll
win64-nosse-csrs.ll
win_chkstk.ll
win_coreclr_chkstk_liveins.mir	Describe stack-id as an enum	2019-06-17 09:13:29 +00:00
win_coreclr_chkstk.ll
win_cst_pool.ll
win-alloca-expander.ll
win-catchpad-csrs.ll
win-catchpad-nested-cxx.ll
win-catchpad-nested.ll
win-catchpad-varargs.ll
win-catchpad.ll
win-cleanuppad.ll
win-funclet-cfi.ll
win-mixed-ehpersonality.ll
win-smallparams.ll
windows-itanium-alloca.ll
wineh-coreclr.ll
wineh-exceptionpointer.ll
wineh-no-ehpads.ll
x32-cet-intrinsics.ll
x32-function_pointer-1.ll
x32-function_pointer-2.ll
x32-function_pointer-3.ll
x32-indirectbr.ll
x32-landingpad.ll
x32-lea-1.ll
x32-movtopush64.ll
x32-va_start.ll
x64-cet-intrinsics.ll
x86_64-mul-by-const.ll
x86-16.ll
x86-32-intrcc.ll
x86-32-vector-calling-conv.ll
x86-64-and-mask.ll
x86-64-arg.ll
x86-64-asm.ll
x86-64-baseptr.ll
x86-64-bittest-logic.ll
x86-64-call.ll
x86-64-disp.ll
x86-64-double-precision-shift-left.ll
x86-64-double-precision-shift-right.ll
x86-64-double-shifts-Oz-Os-O2.ll
x86-64-double-shifts-var.ll
x86-64-extend-shift.ll
x86-64-flags-intrinsics.ll
x86-64-gv-offset.ll
x86-64-intrcc-nosse.ll
x86-64-intrcc.ll
x86-64-jumps.ll
x86-64-mem.ll
x86-64-ms_abi-vararg.ll
x86-64-pic-1.ll
x86-64-pic-2.ll
x86-64-pic-3.ll
x86-64-pic-4.ll
x86-64-pic-5.ll
x86-64-pic-6.ll
x86-64-pic-7.ll
x86-64-pic-8.ll
x86-64-pic-9.ll
x86-64-pic-10.ll
x86-64-pic-11.ll
x86-64-pic-12.ll
x86-64-pic.ll
x86-64-plt-relative-reloc.ll
x86-64-psub.ll
x86-64-ptr-arg-simple.ll
x86-64-ret0.ll
x86-64-shortint.ll
x86-64-sret-return-2.ll
x86-64-sret-return.ll
x86-64-stack-and-frame-ptr.ll
x86-64-static-relo-movl.ll
x86-64-tls-1.ll
x86-64-varargs.ll
x86-64-veccallcc.ll
x86-big-ret.ll
x86-cmov-converter.ll	[MBP] Move a latch block with conditional exit and multi predecessors to top of loop	2019-06-14 23:08:59 +00:00
x86-flags-intrinsics.ll
x86-fold-pshufb.ll
x86-framelowering-trap.ll
x86-inline-asm-validation.ll
x86-interleaved-access.ll	[x86] split more 256-bit stores of concatenated vectors	2019-06-05 16:40:57 +00:00
x86-interleaved-check.ll
x86-interrupt_cc.ll
x86-interrupt_cld.ll
x86-interrupt_vzeroupper.ll
x86-mixed-alignment-dagcombine.ll
x86-no_caller_saved_registers-preserve.ll
x86-no_caller_saved_registers.ll
x86-plt-relative-reloc.ll
x86-repmov-copy-eflags.ll
x86-sanitizer-shrink-wrapping.ll
x86-setcc-int-to-fp-combine.ll
x86-shifts.ll
x86-shrink-wrap-unwind.ll
x86-shrink-wrapping.ll	[Peephole] Allow folding loads into instructions w/multiple uses (such as test64rr)	2019-06-25 17:29:18 +00:00
x86-store-gv-addr.ll
x86-upgrade-avx2-vbroadcast.ll
x86-upgrade-avx-vbroadcast.ll
x86-win64-shrink-wrapping.ll
x87.ll
xaluo.ll
xchg-nofold.ll	[FIX] Forces shrink wrapping to consider any memory access as aliasing with the stack	2019-06-13 13:56:19 +00:00
xmm-r64.ll
xmulo.ll
xop-ifma.ll	Revert r363802, r363850, and r363856 "[TargetLowering] SimplifyDemandedBits..."	2019-06-25 01:32:42 +00:00
xop-intrinsics-fast-isel.ll
xop-intrinsics-x86_64-upgrade.ll
xop-intrinsics-x86_64.ll
xop-mask-comments.ll
xop-pcmov.ll
xor-combine-debugloc.ll	Rename ExpandISelPseudo->FinalizeISel, delay register reservation	2019-06-19 00:25:39 +00:00
xor-icmp.ll
xor-select-i1-combine.ll
xor.ll
xray-attribute-instrumentation.ll
xray-custom-log.ll
xray-empty-firstmbb.mir
xray-empty-function.mir
xray-log-args.ll
xray-loop-detection.ll
xray-multiplerets-in-blocks.mir
xray-section-group.ll
xray-selective-instrumentation-miss.ll
xray-selective-instrumentation.ll
xray-tail-call-sled.ll
xray-typed-event-log.ll
xtest.ll
zero-remat.ll
zext-demanded.ll
zext-extract_subreg.ll
zext-fold.ll
zext-inreg-0.ll
zext-inreg-1.ll
zext-logicop-shift-load.ll
zext-sext.ll
zext-shl.ll
zext-trunc.ll
zlib-longest-match.ll