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5fd17c6d29
Trace through multiple COPYs when looking for a physreg source. Add hinting for vregs that will be copied into physregs (we only hinted for vregs getting copied to a physreg previously). Give hinted a register a bonus when deciding which value to spill. This is part of my rewrite regallocfast series. In fact this one doesn't even have an effect unless you also flip the allocation to happen from back to front of a basic block. Nonetheless it helps to split this up to ease review of D52010 Patch by Matthias Braun git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@360887 91177308-0d34-0410-b5e6-96231b3b80d8
48 lines
1.6 KiB
LLVM
48 lines
1.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -fast-isel -mtriple=i686-unknown-unknown -O0 -mcpu=skx | FileCheck %s
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@c = external global i8, align 1
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; Function Attrs: noinline nounwind
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define void @_Z1av() {
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; CHECK-LABEL: _Z1av:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: subl $2, %esp
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; CHECK-NEXT: .cfi_def_cfa_offset 6
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: # kill: def $al killed $al killed $eax
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; CHECK-NEXT: movb c, %cl
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; CHECK-NEXT: xorb $-1, %cl
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; CHECK-NEXT: testb $1, %cl
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; CHECK-NEXT: movb %al, (%esp) # 1-byte Spill
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; CHECK-NEXT: jne .LBB0_1
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; CHECK-NEXT: jmp .LBB0_2
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; CHECK-NEXT: .LBB0_1: # %land.rhs
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: # kill: def $al killed $al killed $eax
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; CHECK-NEXT: movb %al, (%esp) # 1-byte Spill
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; CHECK-NEXT: jmp .LBB0_2
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; CHECK-NEXT: .LBB0_2: # %land.end
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; CHECK-NEXT: movb (%esp), %al # 1-byte Reload
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; CHECK-NEXT: andb $1, %al
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; CHECK-NEXT: movb %al, {{[0-9]+}}(%esp)
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; CHECK-NEXT: addl $2, %esp
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; CHECK-NEXT: .cfi_def_cfa_offset 4
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; CHECK-NEXT: retl
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entry:
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%b = alloca i8, align 1
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%0 = load i8, i8* @c, align 1
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%tobool = trunc i8 %0 to i1
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%lnot = xor i1 %tobool, true
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br i1 %lnot, label %land.rhs, label %land.end
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land.rhs: ; preds = %entry
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br label %land.end
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land.end: ; preds = %land.rhs, %entry
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%1 = phi i1 [ false, %entry ], [ false, %land.rhs ]
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%conv = zext i1 %1 to i8
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store i8 %conv, i8* %b, align 1
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ret void
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}
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