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AsmParser
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[AsmParser][TableGen] Add VariantID argument to the generated mnemonic spell check function so it can use the correct table based on variant.
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2017-10-26 06:46:41 +00:00 |
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Disassembler
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[AArch64] Fix for buildbots, unused function
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2017-08-18 09:08:05 +00:00 |
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InstPrinter
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Remove unused variables. No functionality change.
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2017-10-08 19:11:02 +00:00 |
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MCTargetDesc
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[AArch64] Use dwarf exception handling on MinGW
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2017-11-03 07:33:20 +00:00 |
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TargetInfo
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Utils
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[AArch64] Add support for dllimport of values and functions
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2017-10-25 07:25:18 +00:00 |
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AArch64.h
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AArch64.td
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AArch64: Enable AES instruction fusion on Cyclone.
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2017-10-17 21:46:15 +00:00 |
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AArch64A53Fix835769.cpp
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AArch64A57FPLoadBalancing.cpp
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AArch64AdvSIMDScalarPass.cpp
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AArch64AsmPrinter.cpp
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[AArch64] Support COFF linker directives
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2017-08-31 08:28:48 +00:00 |
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AArch64CallingConvention.h
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AArch64CallingConvention.td
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AArch64: support SwiftCC properly on AAPCS64
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2017-09-22 04:31:44 +00:00 |
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AArch64CallLowering.cpp
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[GISel]: Fix generation of illegal COPYs during CallLowering
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2017-10-09 20:07:43 +00:00 |
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AArch64CallLowering.h
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GlobalISel (AArch64): fix ABI at border between GPRs and SP.
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2017-08-21 21:56:11 +00:00 |
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AArch64CleanupLocalDynamicTLSPass.cpp
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AArch64CollectLOH.cpp
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AArch64CondBrTuning.cpp
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AArch64ConditionalCompares.cpp
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AArch64ConditionOptimizer.cpp
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AArch64DeadRegisterDefinitionsPass.cpp
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AArch64ExpandPseudoInsts.cpp
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Insert IMPLICIT_DEFS for undef uses in tail merging
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2017-09-06 20:45:24 +00:00 |
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AArch64FalkorHWPFFix.cpp
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[AArch64][Falkor] Ignore SP based loads in HW prefetch fixups.
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2017-09-27 17:14:10 +00:00 |
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AArch64FastISel.cpp
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AArch64FrameLowering.cpp
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[AArch64]: range loopify frame-lowering
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2017-10-30 22:00:06 +00:00 |
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AArch64FrameLowering.h
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AArch64GenRegisterBankInfo.def
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[AArch64][RegisterBankInfo] Add mapping for G_FPEXT.
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2017-11-02 23:38:19 +00:00 |
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AArch64InstrAtomics.td
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AArch64InstrFormats.td
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[globalisel][tablegen] Import stores and allow GISel to automatically substitute zero regs like WZR/XZR/$zero.
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2017-10-23 18:19:24 +00:00 |
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AArch64InstrInfo.cpp
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AArch64: account for possible frame index operand in compares.
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2017-10-17 21:43:52 +00:00 |
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AArch64InstrInfo.h
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[MachineOutliner] Disable outlining from LinkOnceODRs by default
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2017-10-07 00:16:34 +00:00 |
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AArch64InstrInfo.td
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[globalisel][tablegen] Import stores and allow GISel to automatically substitute zero regs like WZR/XZR/$zero.
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2017-10-23 18:19:24 +00:00 |
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AArch64InstructionSelector.cpp
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InstructionSelectorImpl.h: Modularize/remove ODR violations by using a static member function to expose the debug name
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2017-10-26 23:39:54 +00:00 |
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AArch64ISelDAGToDAG.cpp
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AArch64ISelLowering.cpp
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[AArch64] Add support for dllimport of values and functions
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2017-10-25 07:25:18 +00:00 |
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AArch64ISelLowering.h
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[AArch64] Add support for dllimport of values and functions
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2017-10-25 07:25:18 +00:00 |
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AArch64LegalizerInfo.cpp
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[AArch64][LegalizerInfo] Mark s128 G_BITCAST legal
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2017-10-16 22:28:27 +00:00 |
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AArch64LegalizerInfo.h
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AArch64LoadStoreOptimizer.cpp
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AArch64MachineFunctionInfo.h
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AArch64MacroFusion.cpp
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Untabify.
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2017-08-28 06:47:47 +00:00 |
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AArch64MacroFusion.h
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AArch64MCInstLower.cpp
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[AArch64] Add support for dllimport of values and functions
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2017-10-25 07:25:18 +00:00 |
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AArch64MCInstLower.h
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AArch64PBQPRegAlloc.cpp
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AArch64PBQPRegAlloc.h
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AArch64PerfectShuffle.h
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AArch64PromoteConstant.cpp
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AArch64RedundantCopyElimination.cpp
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AArch64: account for possible frame index operand in compares.
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2017-10-17 21:43:52 +00:00 |
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AArch64RegisterBankInfo.cpp
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[AArch64][RegisterBankInfo] Add mapping for G_FPEXT.
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2017-11-02 23:38:19 +00:00 |
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AArch64RegisterBankInfo.h
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[AArch64][RegisterBankInfo] Add mapping for G_FPEXT.
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2017-11-02 23:38:19 +00:00 |
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AArch64RegisterBanks.td
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[aarch64][globalisel] Register banks and classes should have distinct names.
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2017-10-18 00:12:43 +00:00 |
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AArch64RegisterInfo.cpp
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AArch64RegisterInfo.h
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AArch64RegisterInfo.td
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[globalisel][tablegen] Import stores and allow GISel to automatically substitute zero regs like WZR/XZR/$zero.
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2017-10-23 18:19:24 +00:00 |
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AArch64SchedA53.td
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AArch64SchedA57.td
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AArch64SchedA57WriteRes.td
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AArch64SchedCyclone.td
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AArch64SchedFalkor.td
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AArch64SchedFalkorDetails.td
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AArch64SchedKryo.td
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AArch64SchedKryoDetails.td
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AArch64SchedM1.td
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[AArch64] Adjust the cost model for Exynos M1 and M2
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2017-09-18 19:00:38 +00:00 |
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AArch64SchedThunderX2T99.td
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AArch64SchedThunderX.td
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AArch64Schedule.td
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AArch64SelectionDAGInfo.cpp
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AArch64SelectionDAGInfo.h
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AArch64StorePairSuppress.cpp
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AArch64Subtarget.cpp
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[AArch64] Add basic support for Qualcomm's Saphira CPU.
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2017-09-25 14:05:00 +00:00 |
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AArch64Subtarget.h
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[AArch64] Add basic support for Qualcomm's Saphira CPU.
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2017-09-25 14:05:00 +00:00 |
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AArch64SystemOperands.td
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[AArch64] IDSAR6 register assembler support
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2017-08-31 08:36:45 +00:00 |
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AArch64TargetMachine.cpp
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[SimplifyCFG] use pass options and remove the latesimplifycfg pass
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2017-10-28 18:43:07 +00:00 |
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AArch64TargetMachine.h
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Revert "TargetMachine: Merge TargetMachine and LLVMTargetMachine"
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2017-10-12 22:57:28 +00:00 |
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AArch64TargetObjectFile.cpp
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AArch64TargetObjectFile.h
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AArch64TargetTransformInfo.cpp
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Sink some IntrinsicInst.h and Intrinsics.h out of llvm/include
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2017-09-07 23:27:44 +00:00 |
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AArch64TargetTransformInfo.h
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AArch64VectorByElementOpt.cpp
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CMakeLists.txt
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LLVMBuild.txt
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