Craig Topper ac7c8ceef7 [X86] Add avx512vl command lines to the 128/256-bit vector-lzcnt tests so we can see what compare instructions are being used in the lookup table code. ...

I noticed the 512-bit lzcnts don't use the X86 specific lookup table code and instead use the EXPAND case in LegalizeDAG. I was toying around with fixing this and noticed it would require compare instructions that generate i1 masks and then converting from mask to vector. Then I noticed that we don't test which compares are used with avx512vl and no avx512cd.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@303020 91177308-0d34-0410-b5e6-96231b3b80d8

2017-05-14 19:38:11 +00:00

..

AArch64

Add LiveRangeShrink pass to shrink live range within BB.

2017-05-12 19:29:27 +00:00

AMDGPU

AMDGPU/SI: Don't promote to vector if the load/store is volatile.

2017-05-12 20:31:12 +00:00

ARM

[ARM][GlobalISel] Legalize narrow scalar ops by widening

2017-05-11 09:45:57 +00:00

AVR

[AVR] When lowering Select8/Select16, put newly generated MBBs in the same spot

2017-05-13 00:22:34 +00:00

BPF

[bpf] fix a bug which causes incorrect big endian reloc fixup

2017-05-05 18:05:00 +00:00

Generic

Add a late IR expansion pass for the experimental reduction intrinsics.

2017-05-10 09:42:49 +00:00

Hexagon

Add extra operand to CALLSEQ_START to keep frame part set up previously

2017-05-09 13:35:13 +00:00

Inputs

[PR27284] Reverse the ownership between DICompileUnit and DISubprogram.

2016-04-15 15:57:41 +00:00

Lanai

[lanai] Add computeKnownBitsForTargetNode for Lanai.

2017-05-09 18:35:26 +00:00

Mips

Revert "[MIPS] Add support to match more patterns for DINS instruction"

2017-05-09 13:18:48 +00:00

MIR

[IfConversion] Keep the CFG updated incrementally in IfConvertTriangle

2017-05-12 06:28:58 +00:00

MSP430

[MSP430] Generate EABI-compliant libcalls

2017-05-11 19:56:14 +00:00

NVPTX

[NVPTX] Don't flag StoreRetVal memory chain operands as ReadMem (PR32146)

2017-05-12 19:56:43 +00:00

PowerPC

[PPC] Change the register constraint of the first source operand of instruction mtvsrdd to g8rc_nox0

2017-05-11 22:17:35 +00:00

SPARC

Add LiveRangeShrink pass to shrink live range within BB.

2017-05-12 19:29:27 +00:00

SystemZ

Handle a COPY with undef source operand in LowerCopy()

2017-05-12 06:32:03 +00:00

Thumb

[ARM] ScheduleDAGRRList::DelayForLiveRegsBottomUp must consider OptionalDefs

2017-04-23 06:58:08 +00:00

Thumb2

Add address space mangling to lifetime intrinsics

2017-04-10 20:18:21 +00:00

WebAssembly

[WebAssembly] Fix WebAssemblyOptimizeReturned after r300367

2017-04-17 21:40:28 +00:00

WinEH

Avoid infinite loops in branch folding

2016-12-12 23:05:38 +00:00

X86

[X86] Add avx512vl command lines to the 128/256-bit vector-lzcnt tests so we can see what compare instructions are being used in the lookup table code.

2017-05-14 19:38:11 +00:00

XCore

In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled.

2017-03-14 00:34:14 +00:00