Matt Arsenault ad45fb5af4 AMDGPU: Fix not respecting byval alignment in call frame setup ...

This was hackily adding in the 4-bytes reserved for the callee's
emergency stack slot. Treat it like a normal stack allocation
so we get the correct alignment padding behavior. This fixes
an inconsistency between the caller and callee.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340396 91177308-0d34-0410-b5e6-96231b3b80d8

2018-08-22 11:09:45 +00:00

..

AArch64

Revert "Revert r339977: [GISel]: Add Opcodes for a few LLVM Intrinsics"

2018-08-20 18:43:19 +00:00

AMDGPU

AMDGPU: Fix not respecting byval alignment in call frame setup

2018-08-22 11:09:45 +00:00

ARC

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ARM

[DAGCombiner] Reduce load widths of shifted masks

2018-08-21 10:26:59 +00:00

AVR

[AVR] Set trackLivenessAfterRegAlloc

2018-06-11 14:46:48 +00:00

BPF

bpf: add missing RegState to notify MachineInstr verifier necessary register usage

2018-07-27 16:58:52 +00:00

Generic

[DWARF] Unclamp line table version on Darwin for v5 and later.

2018-08-08 21:16:50 +00:00

Hexagon

Change how finalizeBundle selects debug location for the BUNDLE instruction

2018-08-21 10:59:50 +00:00

Inputs

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Lanai

Remove SETCCE use from Lanai's backend

2018-06-03 12:56:24 +00:00

Mips

[mips] Handle missing CondCodes

2018-08-22 09:34:44 +00:00

MIR

Consistently use MemoryLocation::UnknownSize to indicate unknown access size

2018-08-20 20:37:57 +00:00

MSP430

Emit a left-shift instead of a power-of-two multiply for jump-tables

2018-05-16 08:58:26 +00:00

Nios2

[Nios2] Arithmetic instructions for R1 and R2 ISA.

2018-01-09 11:15:08 +00:00

NVPTX

[NVPTX] Remove ftz variants of cvt with rounding mode

2018-08-21 18:44:25 +00:00

PowerPC

Temporarily Revert "[PowerPC] Generate Power9 extswsli extend sign and shift immediate instruction" due to it causing a compiler crash on valid.

2018-08-21 18:35:08 +00:00

RISCV

[SelectionDAG] Improve the legalisation lowering of UMULO.

2018-08-16 18:39:39 +00:00

SPARC

[Sparc] Get sret arg size from CallLoweringInfo.getArgs()

2018-08-17 10:40:00 +00:00

SystemZ

[RegisterCoalscer] Manually remove leftover segments when commuting def

2018-08-21 19:01:26 +00:00

Thumb

[SelectionDAG] Improve the legalisation lowering of UMULO.

2018-08-16 18:39:39 +00:00

Thumb2

[SelectionDAG] Improve the legalisation lowering of UMULO.

2018-08-16 18:39:39 +00:00

WebAssembly

[WebAssembly] Restore __stack_pointer after catch instructions

2018-08-21 21:23:07 +00:00

WinCFGuard

Rename the cfguard module flag to cfguardtable

2018-08-10 09:48:53 +00:00

WinEH

[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.

2018-05-09 02:40:45 +00:00

X86

[X86][SSE] Add sdiv test case from PR38658

2018-08-22 09:47:12 +00:00

XCore

[DAGCombiner] extend(ifpositive(X)) -> shift-right (not X)

2018-07-15 16:27:07 +00:00