llvm/test/CodeGen
Chad Rosier b8f307b2d6 Add support for using non-pic code for arm and thumb1 when emitting the sjlj
dispatch code.  As far as I can tell the thumb2 code is behaving as expected.
I was able to compile and run the associated test case for both arm and thumb1.
rdar://13066352


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176363 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-01 18:30:38 +00:00
..
AArch64 AArch64: be more careful resorting to inefficient addressing for weak vars. 2013-02-28 14:36:31 +00:00
ARM Add support for using non-pic code for arm and thumb1 when emitting the sjlj 2013-03-01 18:30:38 +00:00
CPP
Generic For inline asm: 2013-01-11 18:12:39 +00:00
Hexagon Hexagon: Add constant extender support framework. 2013-03-01 17:37:13 +00:00
MBlaze
Mips [mips] Remove unused option. Fix 80-column violations. 2013-03-01 02:17:02 +00:00
MSP430
NVPTX [NVPTX] Disable vector registers 2013-02-12 14:18:49 +00:00
PowerPC Fix PR15332 (patch by Florian Zeitz). 2013-02-26 21:28:57 +00:00
R600 R600/SI: fix sampler tests after fixing wait insertions 2013-03-01 17:39:05 +00:00
SI Add R600 backend 2012-12-11 21:25:42 +00:00
SPARC
Thumb Fix thumbv5e frame lowering assertion failure. 2013-02-20 12:21:33 +00:00
Thumb2 Make ARMAsmPrinter generate the correct alignment specifier syntax in instructions. 2013-02-22 10:01:33 +00:00
X86 Add a test case for r176066. 2013-02-26 20:22:30 +00:00
XCore