Craig Topper a6f2bdc947 [X86] Add nopq instruction which is a rex encoded version of nopl for gas compatibility. ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308818 91177308-0d34-0410-b5e6-96231b3b80d8

2017-07-22 01:30:53 +00:00

..

avx-512.txt

[X86] Adding vpopcntd and vpopcntq instructions

2017-05-25 13:45:23 +00:00

fp-stack.txt

[X86] Adding FFREEP instruction.

2017-01-27 18:02:53 +00:00

hex-immediates.txt

llvm-mc: Add option for prefering hex format disassembly.

2014-06-11 20:26:40 +00:00

intel-syntax-32.txt

[X86] Don't print 'dword ptr' or 'qword ptr' on the operand to some of the LEA variants in Intel syntax. The memory operand is inherently unsized.

2015-01-08 07:41:30 +00:00

intel-syntax.txt

AVX512F: Add GATHER/SCATTER assembler Intel syntax tests for knl/skx/avx . Change memory operand parser handling.

2016-02-25 13:30:17 +00:00

invalid-VEX-vvvv.txt

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lit.local.cfg

Reduce verbiage of lit.local.cfg files

2014-06-09 22:42:55 +00:00

marked-up.txt

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missing-sib.txt

Test case for r204305.

2014-03-20 06:45:10 +00:00

moffs.txt

[X86] Make the instructions that use AdSize16/32/64 co-exist together without using mode predicates.

2015-01-02 07:02:25 +00:00

padlock.txt

Remove A6/A7 opcode maps. They can all be handled with a TB map, opcode of 0xa6/0xa7, and adding MRM_C0/MRM_E0 forms. Removes 376K from the disassembler tables.

2014-02-19 05:34:21 +00:00

prefixes.txt

[X86] Disassembler support for move to/from %rax with a 32-bit memory offset is REX.W and AdSize prefix are both present.

2015-01-03 00:00:20 +00:00

simple-tests.txt

Add new flag and intrinsic support for MWAITX and MONITORX instructions

2016-05-18 11:59:12 +00:00

truncated-input.txt

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x86-16.txt

[X86][Disassembler] Added SALC instruction

2017-01-29 23:02:47 +00:00

x86-32.txt

[X86] Add register form of NOPL and NOPW for assembler/disassembler.

2017-07-22 01:30:51 +00:00

x86-64.txt

[X86] Add nopq instruction which is a rex encoded version of nopl for gas compatibility.

2017-07-22 01:30:53 +00:00