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1076969bfe
Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323922 91177308-0d34-0410-b5e6-96231b3b80d8
20 lines
607 B
LLVM
20 lines
607 B
LLVM
; REQUIRES: asserts
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; RUN: llc -verify-machineinstrs -O0 -debug -o - < %s 2>&1 | FileCheck %s
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target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
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target triple = "powerpc64-unknown-linux-gnu"
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define i128 @foo() nounwind {
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entry:
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%x = alloca i128, align 16
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store i128 27, i128* %x, align 16
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%0 = load i128, i128* %x, align 16
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ret i128 %0
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}
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; CHECK: ********** Function: foo
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; CHECK: ********** FAST REGISTER ALLOCATION **********
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; CHECK: $x3 = COPY %{{[0-9]+}}
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; CHECK-NEXT: $x4 = COPY %{{[0-9]+}}
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; CHECK-NEXT: BLR
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