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Generate code for the Blackfin family of DSPs from Analog Devices: http://www.analog.com/en/embedded-processing-dsp/blackfin/processors/index.html We aim to be compatible with the exsisting GNU toolchain found at: http://blackfin.uclinux.org/gf/project/toolchain The back-end is experimental. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77897 91177308-0d34-0410-b5e6-96231b3b80d8
19 lines
477 B
LLVM
19 lines
477 B
LLVM
; RUN: llvm-as < %s | llc -march=bfin -verify-machineinstrs > %t
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type { i24, i1 } ; type %0
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define i1 @func2(i24 zeroext %v1, i24 zeroext %v2) nounwind {
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entry:
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%t = call %0 @llvm.uadd.with.overflow.i24(i24 %v1, i24 %v2) ; <%0> [#uses=1]
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%obit = extractvalue %0 %t, 1 ; <i1> [#uses=1]
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br i1 %obit, label %carry, label %normal
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normal: ; preds = %entry
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ret i1 true
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carry: ; preds = %entry
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ret i1 false
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}
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declare %0 @llvm.uadd.with.overflow.i24(i24, i24) nounwind
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