Eli Friedman c7cc20b7d7 [MachineOutliner] Count savings from outlining in bytes. ...

Counting the number of instructions is both unintuitive and inaccurate.
On AArch64, this only affects the generated remarks and certain rare
pseudo-instructions, but it will have a bigger impact on other targets.

Differential Revision: https://reviews.llvm.org/D46921



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332685 91177308-0d34-0410-b5e6-96231b3b80d8

2018-05-18 01:52:16 +00:00

..

AArch64

[MachineOutliner] Count savings from outlining in bytes.

2018-05-18 01:52:16 +00:00

AMDGPU

AMDGPU/SI: Don't promote alloca to vector for atomic load/store

2018-05-17 21:49:44 +00:00

ARC

[ARC] Add ARC backend.

2017-08-24 15:40:33 +00:00

ARM

[ARM] preserve test intent by removing undef

2018-05-17 18:09:56 +00:00

AVR

[AVR] Add a regression test for struct return lowering

2018-03-20 11:23:03 +00:00

BPF

[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.

2018-05-09 02:40:45 +00:00

Generic

[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.

2018-05-09 02:40:45 +00:00

Hexagon

[Hexagon] preserve test intent by removing undef

2018-05-16 22:49:08 +00:00

Inputs

…

Lanai

Followup on Proposal to move MIR physical register namespace to '$' sigil.

2018-01-31 22:04:26 +00:00

Mips

[mips] Add support for isBranchOffsetInRange and use it for MipsLongBranch

2018-05-16 10:03:05 +00:00

MIR

[NFC] MIR-Canon: switching to a stable string sorting of instructions.

2018-05-13 06:07:20 +00:00

MSP430

Emit a left-shift instead of a power-of-two multiply for jump-tables

2018-05-16 08:58:26 +00:00

Nios2

[Nios2] Arithmetic instructions for R1 and R2 ISA.

2018-01-09 11:15:08 +00:00

NVPTX

[NVPTX] Added a feature to use short pointers for const/local/shared AS.

2018-05-09 23:46:19 +00:00

PowerPC

[PowerPC] preserve test intent by removing undef

2018-05-16 22:48:48 +00:00

RISCV

[RISCV] Separate base from offset in lowerGlobalAddress

2018-05-17 18:14:53 +00:00

SPARC

[DAGCombiner] Set the right SDLoc on a newly-created zextload (1/N)

2018-05-01 19:26:15 +00:00

SystemZ

[SystemZ] Bugfix for MVCLoop CC clobbering.

2018-05-07 10:48:43 +00:00

Thumb

Reapply ARM: Do not spill CSR to stack on entry to noreturn functions

2018-04-07 10:57:03 +00:00

Thumb2

[Thumb2] fix typo in test from r332548

2018-05-17 03:24:25 +00:00

WebAssembly

[WebAsembly] Update default triple in test files to wasm32-unknown-unkown.

2018-05-10 17:49:11 +00:00

WinCFGuard

Reland "Emit Function IDs table for Control Flow Guard"

2018-01-09 23:49:30 +00:00

WinEH

[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.

2018-05-09 02:40:45 +00:00

X86

[X86DomainReassignment] Don't compare stack-allocated values by address

2018-05-18 01:03:01 +00:00

XCore

[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.

2018-05-09 02:40:45 +00:00